Searched refs:LDEXP (Results 1 – 17 of 17) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/ |
| D | exp2-1.ll | 3 … | FileCheck %s -check-prefix=CHECK -check-prefix=INTRINSIC -check-prefix=LDEXP -check-prefix=LDEX…
4 …triple=i386-pc-win32 | FileCheck %s -check-prefix=INTRINSIC -check-prefix=LDEXP -check-prefix=NOLD…
87 ; LDEXP: call double @ldexp
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| /external/llvm/test/Transforms/InstCombine/ |
| D | exp2-1.ll | 3 … | FileCheck %s -check-prefix=CHECK -check-prefix=INTRINSIC -check-prefix=LDEXP -check-prefix=LDEX…
4 …triple=i386-pc-win32 | FileCheck %s -check-prefix=INTRINSIC -check-prefix=LDEXP -check-prefix=NOLD…
87 ; LDEXP: call double @ldexp
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | sint_to_fp.f64.ll | 51 ; SI-DAG: v_ldexp_f64 [[LDEXP:v\[[0-9]+:[0-9]+\]]], [[HI_CONV]], 32
52 ; SI: v_add_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[LDEXP]], [[LO_CONV]]
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| D | uint_to_fp.f64.ll | 9 ; SI-DAG: v_ldexp_f64 [[LDEXP:v\[[0-9]+:[0-9]+\]]], [[HI_CONV]], 32
10 ; SI: v_add_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[LDEXP]], [[LO_CONV]]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | sint_to_fp.f64.ll | 51 ; SI-DAG: v_ldexp_f64 [[LDEXP:v\[[0-9]+:[0-9]+\]]], [[HI_CONV]], 32
52 ; SI: v_add_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[LDEXP]], [[LO_CONV]]
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| D | uint_to_fp.f64.ll | 9 ; SI-DAG: v_ldexp_f64 [[LDEXP:v\[[0-9]+:[0-9]+\]]], [[HI_CONV]], 32
10 ; SI: v_add_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[LDEXP]], [[LO_CONV]]
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.h | 259 LDEXP, enumerator
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| D | AMDGPUInstrInfo.td | 73 def AMDGPUldexp : SDNode<"AMDGPUISD::LDEXP", AMDGPULdExpOp>;
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| D | AMDGPUISelLowering.cpp | 930 return DAG.getNode(AMDGPUISD::LDEXP, DL, VT, Op.getOperand(1), in LowerINTRINSIC_WO_CHAIN()
2005 SDValue LdExp = DAG.getNode(AMDGPUISD::LDEXP, SL, MVT::f64, CvtHi, in LowerINT_TO_FP64()
2830 NODE_NAME_CASE(LDEXP) in getTargetNodeName()
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| D | SIISelLowering.cpp | 1872 return DAG.getNode(AMDGPUISD::LDEXP, DL, VT, in LowerINTRINSIC_WO_CHAIN()
3054 case AMDGPUISD::LDEXP: { in PerformDAGCombine()
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_info_opcodes.h | 22 OPCODE(1, 2, COMP, LDEXP)
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.h | 388 LDEXP, enumerator
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| D | AMDGPUInstrInfo.td | 148 def AMDGPUldexp : SDNode<"AMDGPUISD::LDEXP", AMDGPULdExpOp>;
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| D | AMDGPUISelLowering.cpp | 2400 SDValue LdExp = DAG.getNode(AMDGPUISD::LDEXP, SL, MVT::f64, CvtHi, in LowerINT_TO_FP64()
4040 NODE_NAME_CASE(LDEXP) in getTargetNodeName()
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| D | SIISelLowering.cpp | 4950 return DAG.getNode(AMDGPUISD::LDEXP, DL, VT, in LowerINTRINSIC_WO_CHAIN()
6731 case AMDGPUISD::LDEXP: in fp16SrcZerosHighBits()
7874 case AMDGPUISD::LDEXP: { in PerformDAGCombine()
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| /external/mesa3d/src/gallium/docs/source/ |
| D | screen.rst | 494 * ``PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED``: Whether LDEXP is supported.
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| D | tgsi.rst | 354 .. opcode:: LDEXP - Multiply Number by Integral Power of 2
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