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Searched refs:LDLARH (Results 1 – 16 of 16) sorted by relevance

/external/vixl/src/aarch64/
Dcpu-features-auditor-aarch64.cc507 case LDLARH: in VisitLoadStoreExclusive()
Dconstants-aarch64.h1020 LDLARH = LoadStoreExclusiveFixed | 0x40C00000, enumerator
Ddisasm-aarch64.cc1373 V(LDLARH, "ldlarh", "'Wt") \
Dsimulator-aarch64.cc1855 case LDLARH: in VisitLoadStoreExclusive()
Dassembler-aarch64.cc1559 Emit(LDLARH | Rs_mask | Rt(rt) | Rt2_mask | RnSP(src.GetBaseRegister())); in ldlarh()
/external/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp1118 case AArch64::LDLARH: in DecodeExclusiveLdStInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp1316 case AArch64::LDLARH: in DecodeExclusiveLdStInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64SchedThunderX2T99.td1790 (instrs LDLARB, LDLARH, LDLARW, LDLARX)>;
DAArch64InstrInfo.td2761 def LDLARH : LoadAcquire <0b01, 1, 1, 0, 0, GPR32, "ldlarh">;
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenMCCodeEmitter.inc2226 UINT64_C(1222605824), // LDLARH
9851 case AArch64::LDLARH:
14278 Feature_HasV8_1a | 0, // LDLARH = 2213
DAArch64GenAsmWriter.inc3025 2253966144U, // LDLARH
7544 27U, // LDLARH
DAArch64GenAsmWriter1.inc3974 205628581U, // LDLARH
8493 27U, // LDLARH
DAArch64GenInstrInfo.inc2228 LDLARH = 2213,
8115 …deledSideEffects), 0x1ULL, nullptr, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #2213 = LDLARH
DAArch64GenAsmMatcher.inc15115 …{ 2266 /* ldlarh */, AArch64::LDLARH, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR32,…
21584 …{ 2266 /* ldlarh */, AArch64::LDLARH, Convert__Reg1_0__GPR64sp01_2, Feature_HasV8_1a, { MCK_GPR32,…
DAArch64GenDisassemblerTables.inc6281 /* 29459 */ MCD::OPC_Decode, 165, 17, 145, 1, // Opcode: LDLARH
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td2480 def LDLARH : LoadAcquire <0b01, 1, 1, 0, 0, GPR32, "ldlarh">;