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Searched refs:LDST (Results 1 – 8 of 8) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/ExecutionEngine/RuntimeDyld/AArch64/
DELF_ARM64_relocations.s37 # Align next label to 16 bytes, so that LDST immediate
/external/llvm/lib/Target/Mips/
DMipsScheduleP5600.td61 // LDST Pipeline
106 // LDST is also used in moves from general purpose registers to floating point
/external/llvm/test/CodeGen/AArch64/
Darm64-misched-basic-A53.ll178 ; Resource contention on LDST.
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-misched-basic-A53.ll178 ; Resource contention on LDST.
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsScheduleP5600.td93 // LDST Pipeline
137 // LDST is also used in moves from general purpose registers to floating point
DMipsScheduleGeneric.td229 // LDST Pipeline
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMScheduleR52.td17 // There are two ALUs, one LDST, one MUL and a non-pipelined integer DIV.
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp4076 bool DAGCombiner::isLegalNarrowLdSt(LSBaseSDNode *LDST, in isLegalNarrowLdSt() argument
4079 if (!LDST) in isLegalNarrowLdSt()
4091 if (LDST->isVolatile()) in isLegalNarrowLdSt()
4095 if (LDST->getMemoryVT().getSizeInBits() < MemVT.getSizeInBits()) in isLegalNarrowLdSt()
4101 LDST->getAddressSpace(), ShAmt / 8)) in isLegalNarrowLdSt()
4105 EVT PtrType = LDST->getBasePtr().getValueType(); in isLegalNarrowLdSt()
4109 if (isa<LoadSDNode>(LDST)) { in isLegalNarrowLdSt()
4110 LoadSDNode *Load = cast<LoadSDNode>(LDST); in isLegalNarrowLdSt()
4138 assert(isa<StoreSDNode>(LDST) && "It is not a Load nor a Store SDNode"); in isLegalNarrowLdSt()
4139 StoreSDNode *Store = cast<StoreSDNode>(LDST); in isLegalNarrowLdSt()