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Searched refs:LD_B (Results 1 – 25 of 27) sorted by relevance

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/external/libvpx/libvpx/third_party/libyuv/include/libyuv/
Dmacros_msa.h140 #define LD_B(RTYPE, psrc) *((RTYPE*)(psrc)) /* NOLINT */ macro
141 #define LD_UB(...) LD_B(const v16u8, __VA_ARGS__)
158 out0 = LD_B(RTYPE, (psrc)); \
159 out1 = LD_B(RTYPE, (psrc) + stride); \
/external/libyuv/files/include/libyuv/
Dmacros_msa.h140 #define LD_B(RTYPE, psrc) *((RTYPE*)(psrc)) /* NOLINT */ macro
141 #define LD_UB(...) LD_B(v16u8, __VA_ARGS__)
158 out0 = LD_B(RTYPE, (psrc)); \
159 out1 = LD_B(RTYPE, (psrc) + stride); \
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/msa/
Demergency-spill.mir138 $w0 = LD_B %stack.1.a, 0 :: (dereferenceable load 16 from %ir.a)
141 $w1 = LD_B %stack.2.b, 0 :: (dereferenceable load 16 from %ir.b)
178 $w0 = LD_B %stack.3.a.addr, 0 :: (dereferenceable load 16 from %ir.a.addr)
212 $w1 = LD_B %stack.4.b.addr, 0 :: (dereferenceable load 16 from %ir.b.addr)
215 $w0 = LD_B %stack.4.b.addr, 0 :: (dereferenceable load 16 from %ir.b.addr)
/external/libvpx/libvpx/vp8/common/mips/msa/
Dvp8_macros_msa.h19 #define LD_B(RTYPE, psrc) *((const RTYPE *)(psrc)) macro
20 #define LD_UB(...) LD_B(v16u8, __VA_ARGS__)
21 #define LD_SB(...) LD_B(v16i8, __VA_ARGS__)
270 out0 = LD_B(RTYPE, (psrc)); \
271 out1 = LD_B(RTYPE, (psrc) + stride); \
279 out2 = LD_B(RTYPE, (psrc) + 2 * stride); \
295 out4 = LD_B(RTYPE, (psrc) + 4 * stride); \
/external/libpng/mips/
Dfilter_msa_intrinsics.c250 #define LD_B(RTYPE, psrc) *((RTYPE *) (psrc)) macro
251 #define LD_UB(...) LD_B(v16u8, __VA_ARGS__)
254 out0 = LD_B(RTYPE, (psrc)); \
255 out1 = LD_B(RTYPE, (psrc) + stride); \
/external/llvm/lib/Target/Mips/
DMipsSERegisterInfo.cpp68 case Mips::LD_B: in getLoadStoreOffsetSizeInBits()
DMipsSEInstrInfo.cpp284 Opc = Mips::LD_B; in loadRegFromStack()
DMipsMSAInstrInfo.td3214 def LD_B: LD_B_ENC, LD_B_DESC;
/external/webp/src/dsp/
Dmsa_macro.h48 #define LD_B(RTYPE, psrc) *((RTYPE*)(psrc)) macro
49 #define LD_UB(...) LD_B(v16u8, __VA_ARGS__)
50 #define LD_SB(...) LD_B(v16i8, __VA_ARGS__)
221 out0 = LD_B(RTYPE, psrc); \
222 out1 = LD_B(RTYPE, psrc + stride); \
229 out2 = LD_B(RTYPE, psrc + 2 * stride); \
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsSERegisterInfo.cpp69 case Mips::LD_B: in getLoadStoreOffsetSizeInBits()
DMipsSEInstrInfo.cpp357 Opc = Mips::LD_B; in loadRegFromStack()
DMipsMSAInstrInfo.td3235 def LD_B: LD_B_ENC, LD_B_DESC;
/external/libaom/libaom/aom_dsp/mips/
Dmacros_msa.h21 #define LD_B(RTYPE, psrc) *((const RTYPE *)(psrc)) macro
22 #define LD_UB(...) LD_B(v16u8, __VA_ARGS__)
23 #define LD_SB(...) LD_B(v16i8, __VA_ARGS__)
297 out0 = LD_B(RTYPE, (psrc)); \
298 out1 = LD_B(RTYPE, (psrc) + stride); \
306 out2 = LD_B(RTYPE, (psrc) + 2 * stride); \
321 out4 = LD_B(RTYPE, (psrc) + 4 * stride); \
/external/v8/src/mips/
Dconstants-mips.h747 LD_B = ((8U << 2) + 0), enumerator
Dassembler-mips.cc3258 V(ld_b, LD_B) \
/external/v8/src/mips64/
Dconstants-mips64.h781 LD_B = ((8U << 2) + 0), enumerator
Dassembler-mips64.cc3575 V(ld_b, LD_B) \
/external/llvm/lib/Target/Mips/Disassembler/
DMipsDisassembler.cpp1486 case Mips::LD_B: in DecodeMSA128Mem()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/Disassembler/
DMipsDisassembler.cpp1716 case Mips::LD_B: in DecodeMSA128Mem()
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc934 12599727U, // LD_B
2648 0U, // LD_B
DMipsGenDisassemblerTables.inc2990 /* 10526 */ MCD_OPC_Decode, 149, 7, 167, 1, // Opcode: LD_B
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenMCCodeEmitter.inc1653 UINT64_C(2013265952), // LD_B
2788 case Mips::LD_B:
9379 Feature_HasStdEnc | Feature_HasMSA | 0, // LD_B = 1640
DMipsGenAsmWriter.inc2868 25183009U, // LD_B
5499 0U, // LD_B
DMipsGenInstrInfo.inc1655 LD_B = 1640,
5700 …ULL<<MCID::MayLoad), 0x6ULL, nullptr, nullptr, OperandInfo267, -1 ,nullptr }, // Inst #1640 = LD_B
DMipsGenDisassemblerTables.inc5449 /* 13386 */ MCD::OPC_Decode, 232, 12, 175, 2, // Opcode: LD_B

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