| /external/llvm/lib/Target/Mips/ |
| D | MipsSERegisterInfo.cpp | 71 case Mips::LD_H: in getLoadStoreOffsetSizeInBits()
88 case Mips::LD_H: in getLoadStoreOffsetAlign()
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| D | MipsSEInstrInfo.cpp | 286 Opc = Mips::LD_H; in loadRegFromStack()
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| D | MipsMSAInstrInfo.td | 3215 def LD_H: LD_H_ENC, LD_H_DESC;
3526 def : MSAPat<(v8f16 (load addrimm10:$addr)), (LD_H addrimm10:$addr)>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSERegisterInfo.cpp | 72 case Mips::LD_H: in getLoadStoreOffsetSizeInBits()
132 case Mips::LD_H: in getLoadStoreOffsetAlign()
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| D | MipsSEInstrInfo.cpp | 360 Opc = Mips::LD_H; in loadRegFromStack()
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| D | MipsMSAInstrInfo.td | 3236 def LD_H: LD_H_ENC, LD_H_DESC;
3547 def : MSAPat<(v8f16 (load addrimm10lsl1:$addr)), (LD_H addrimm10lsl1:$addr)>;
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| /external/webp/src/dsp/ |
| D | msa_macro.h | 52 #define LD_H(RTYPE, psrc) *((RTYPE*)(psrc)) macro
53 #define LD_UH(...) LD_H(v8u16, __VA_ARGS__)
54 #define LD_SH(...) LD_H(v8i16, __VA_ARGS__)
256 out0 = LD_H(RTYPE, psrc); \
257 out1 = LD_H(RTYPE, psrc + stride); \
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| /external/libvpx/libvpx/vp8/common/mips/msa/ |
| D | vp8_macros_msa.h | 23 #define LD_H(RTYPE, psrc) *((const RTYPE *)(psrc)) macro
24 #define LD_UH(...) LD_H(v8u16, __VA_ARGS__)
25 #define LD_SH(...) LD_H(v8i16, __VA_ARGS__)
317 out0 = LD_H(RTYPE, (psrc)); \
318 out1 = LD_H(RTYPE, (psrc) + (stride)); \
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| /external/libaom/libaom/aom_dsp/mips/ |
| D | macros_msa.h | 25 #define LD_H(RTYPE, psrc) *((const RTYPE *)(psrc)) macro
26 #define LD_UH(...) LD_H(v8u16, __VA_ARGS__)
27 #define LD_SH(...) LD_H(v8i16, __VA_ARGS__)
350 out0 = LD_H(RTYPE, (psrc)); \
351 out1 = LD_H(RTYPE, (psrc) + (stride)); \
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| /external/v8/src/mips/ |
| D | constants-mips.h | 748 LD_H = ((8U << 2) + 1), enumerator
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| D | assembler-mips.cc | 3259 V(ld_h, LD_H) \
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 782 LD_H = ((8U << 2) + 1), enumerator
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| D | assembler-mips64.cc | 3576 V(ld_h, LD_H) \
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| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 1490 case Mips::LD_H: in DecodeMSA128Mem()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 1720 case Mips::LD_H: in DecodeMSA128Mem()
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| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 936 12603130U, // LD_H
2650 0U, // LD_H
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| D | MipsGenDisassemblerTables.inc | 2993 /* 10539 */ MCD_OPC_Decode, 151, 7, 167, 1, // Opcode: LD_H
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenMCCodeEmitter.inc | 1655 UINT64_C(2013265953), // LD_H
2831 case Mips::LD_H:
9381 Feature_HasStdEnc | Feature_HasMSA | 0, // LD_H = 1642
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| D | MipsGenAsmWriter.inc | 2870 25186622U, // LD_H
5501 0U, // LD_H
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| D | MipsGenDAGISel.inc | 1307 /* 2321*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::LD_H), 0|OPFL_Chain|OPFL_MemRefs,
1310 // Dst: (LD_H:{ *:[v8i16] } addrimm10lsl1:{ *:[iPTR] }:$addr)
1353 /* 2423*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::LD_H), 0|OPFL_Chain|OPFL_MemRefs,
1356 // Dst: (LD_H:{ *:[v8f16] } addrimm10lsl1:{ *:[iPTR] }:$addr)
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| D | MipsGenInstrInfo.inc | 1657 LD_H = 1642,
5702 …ULL<<MCID::MayLoad), 0x6ULL, nullptr, nullptr, OperandInfo269, -1 ,nullptr }, // Inst #1642 = LD_H
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| D | MipsGenDisassemblerTables.inc | 5452 /* 13401 */ MCD::OPC_Decode, 234, 12, 175, 2, // Opcode: LD_H
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| D | MipsGenAsmMatcher.inc | 6441 …{ 5440 /* ld.h */, Mips::LD_H, Convert__MSA128AsmReg1_0__MemOffsetSimm10_12_1, Feature_HasStdEnc|F…
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