/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86MCInstLower.cpp | 548 MCInst LEA; in LowerTlsAddr() local 550 LEA.setOpcode(X86::LEA64r); in LowerTlsAddr() 551 LEA.addOperand(MCOperand::CreateReg(X86::RDI)); // dest in LowerTlsAddr() 552 LEA.addOperand(MCOperand::CreateReg(X86::RIP)); // base in LowerTlsAddr() 553 LEA.addOperand(MCOperand::CreateImm(1)); // scale in LowerTlsAddr() 554 LEA.addOperand(MCOperand::CreateReg(0)); // index in LowerTlsAddr() 555 LEA.addOperand(MCOperand::CreateExpr(symRef)); // disp in LowerTlsAddr() 556 LEA.addOperand(MCOperand::CreateReg(0)); // seg in LowerTlsAddr() 558 LEA.setOpcode(X86::LEA32r); in LowerTlsAddr() 559 LEA.addOperand(MCOperand::CreateReg(X86::EAX)); // dest in LowerTlsAddr() [all …]
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/external/llvm/lib/Target/X86/ |
D | X86FixupLEAs.cpp | 253 static inline bool isLEASimpleIncOrDec(MachineInstr &LEA) { in isLEASimpleIncOrDec() argument 254 unsigned SrcReg = LEA.getOperand(1 + X86::AddrBaseReg).getReg(); in isLEASimpleIncOrDec() 255 unsigned DstReg = LEA.getOperand(0).getReg(); in isLEASimpleIncOrDec() 258 LEA.getOperand(1 + X86::AddrIndexReg).getReg() == 0 && in isLEASimpleIncOrDec() 259 LEA.getOperand(1 + X86::AddrSegmentReg).getReg() == 0 && in isLEASimpleIncOrDec() 260 LEA.getOperand(AddrDispOp).isImm() && in isLEASimpleIncOrDec() 261 (LEA.getOperand(AddrDispOp).getImm() == 1 || in isLEASimpleIncOrDec() 262 LEA.getOperand(AddrDispOp).getImm() == -1); in isLEASimpleIncOrDec()
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D | X86MCInstLower.cpp | 725 MCInst LEA; in LowerTlsAddr() local 727 LEA.setOpcode(X86::LEA64r); in LowerTlsAddr() 728 LEA.addOperand(MCOperand::createReg(X86::RDI)); // dest in LowerTlsAddr() 729 LEA.addOperand(MCOperand::createReg(X86::RIP)); // base in LowerTlsAddr() 730 LEA.addOperand(MCOperand::createImm(1)); // scale in LowerTlsAddr() 731 LEA.addOperand(MCOperand::createReg(0)); // index in LowerTlsAddr() 732 LEA.addOperand(MCOperand::createExpr(symRef)); // disp in LowerTlsAddr() 733 LEA.addOperand(MCOperand::createReg(0)); // seg in LowerTlsAddr() 735 LEA.setOpcode(X86::LEA32r); in LowerTlsAddr() 736 LEA.addOperand(MCOperand::createReg(X86::EAX)); // dest in LowerTlsAddr() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86FixupLEAs.cpp | 333 static inline bool isLEASimpleIncOrDec(MachineInstr &LEA) { in isLEASimpleIncOrDec() argument 334 unsigned SrcReg = LEA.getOperand(1 + X86::AddrBaseReg).getReg(); in isLEASimpleIncOrDec() 335 unsigned DstReg = LEA.getOperand(0).getReg(); in isLEASimpleIncOrDec() 338 LEA.getOperand(1 + X86::AddrIndexReg).getReg() == 0 && in isLEASimpleIncOrDec() 339 LEA.getOperand(1 + X86::AddrSegmentReg).getReg() == 0 && in isLEASimpleIncOrDec() 340 LEA.getOperand(AddrDispOp).isImm() && in isLEASimpleIncOrDec() 341 (LEA.getOperand(AddrDispOp).getImm() == 1 || in isLEASimpleIncOrDec() 342 LEA.getOperand(AddrDispOp).getImm() == -1); in isLEASimpleIncOrDec()
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D | X86MCInstLower.cpp | 760 MCInst LEA; in LowerTlsAddr() local 762 LEA.setOpcode(X86::LEA64r); in LowerTlsAddr() 763 LEA.addOperand(MCOperand::createReg(X86::RDI)); // dest in LowerTlsAddr() 764 LEA.addOperand(MCOperand::createReg(X86::RIP)); // base in LowerTlsAddr() 765 LEA.addOperand(MCOperand::createImm(1)); // scale in LowerTlsAddr() 766 LEA.addOperand(MCOperand::createReg(0)); // index in LowerTlsAddr() 767 LEA.addOperand(MCOperand::createExpr(symRef)); // disp in LowerTlsAddr() 768 LEA.addOperand(MCOperand::createReg(0)); // seg in LowerTlsAddr() 770 LEA.setOpcode(X86::LEA32r); in LowerTlsAddr() 771 LEA.addOperand(MCOperand::createReg(X86::EAX)); // dest in LowerTlsAddr() [all …]
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D | X86SchedPredicates.td | 22 // A predicate used to check if an instruction is a LEA, and if it uses all 46 // 3-operands LEA. Tablegen automatically generates a new method for it in
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D | X86ScheduleBtVer2.td | 37 def JSAGU : ProcResource<1>; // Integer Pipe3: SAGU (also handles 3-operand LEA) 649 // This write is used for slow LEA instructions. 654 // On Jaguar, a slow LEA is either a 3Ops LEA (base, index, offset), or an LEA 658 // A 3-operand LEA (base, index, offset). 660 // An LEA with a "Scale" different than 1.
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/external/llvm/test/CodeGen/X86/ |
D | add-nsw-sext.ll | 22 ; we allow LEA formation and eliminate an add instruction. 37 ; Throw in a scale (left shift) because an LEA can do that too. 38 ; Use a negative constant (LEA displacement) to verify that's handled correctly. 123 ; LEA can't scale by 16, but the adds can still be combined into an LEA.
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D | overlap-shift.ll | 5 ;; allocator turns the shift into an LEA. This also occurs for ADD. 7 ; Check that the shift gets turned into an LEA.
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D | atom-fixup-lea2.ll | 9 ; Test for fixup lea pre-emit pass. LEA instructions should be substituted for 11 ; precede the load within 5 instructions. An LEA should also be substituted for 12 ; an ADD which computes part of the index because it precedes the index LEA
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D | twoaddr-lea.ll | 5 ;; allocator turns the shift into an LEA. This also occurs for ADD. 7 ; Check that the shift gets turned into an LEA.
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D | mul-shift-reassoc.ll | 5 ; Push the shl through the mul to allow an LEA to be formed, instead
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D | lea-opt.ll | 97 ; Check that LEA optimization pass takes into account a resultant address 98 ; displacement when choosing a LEA instruction for replacing a redundant 120 ; Make sure the REG3's definition LEA won't be removed as redundant.
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
D | overlap-shift.ll | 5 ;; allocator turns the shift into an LEA. This also occurs for ADD. 7 ; Check that the shift gets turned into an LEA.
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D | add-ext.ll | 23 ; we allow LEA formation and eliminate an add instruction. 38 ; Throw in a scale (left shift) because an LEA can do that too. 39 ; Use a negative constant (LEA displacement) to verify that's handled correctly. 124 ; LEA can't scale by 16, but the adds can still be combined into an LEA.
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D | atom-fixup-lea2.ll | 10 ; Test for fixup lea pre-emit pass. LEA instructions should be substituted for 12 ; precede the load within 5 instructions. An LEA should also be substituted for 13 ; an ADD which computes part of the index because it precedes the index LEA
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D | lea-opt-with-debug.mir | 3 # Test that the optimize LEA pass can remove a redundant LEA even when it is 4 # also used by a DBG_VALUE. Check that the uses of the replaced LEA are updated
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D | twoaddr-lea.ll | 5 ;; allocator turns the shift into an LEA. This also occurs for ADD. 7 ; Check that the shift gets turned into an LEA.
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D | mul-shift-reassoc.ll | 5 ; Push the shl through the mul to allow an LEA to be formed, instead
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D | 2007-02-04-OrAddrMode.ll | 3 ;; This example can't fold the or into an LEA.
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/external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
D | overlap-shift.ll | 5 ;; allocator turns the shift into an LEA. This also occurs for ADD. 7 ; Check that the shift gets turned into an LEA.
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D | twoaddr-lea.ll | 5 ;; allocator turns the shift into an LEA. This also occurs for ADD. 7 ; Check that the shift gets turned into an LEA.
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D | mul-shift-reassoc.ll | 5 ; Push the shl through the mul to allow an LEA to be formed, instead
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D | 2007-02-04-OrAddrMode.ll | 3 ;; This example can't fold the or into an LEA.
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/external/swiftshader/third_party/LLVM/utils/TableGen/ |
D | EDEmitter.cpp | 245 #define LEA(str) if (name == str) SET("kOperandTypeX86EffectiveAddress"); macro 314 LEA("lea32mem"); in X86TypeFromOpName() 315 LEA("lea64_32mem"); in X86TypeFromOpName() 316 LEA("lea64mem"); in X86TypeFromOpName() 339 #undef LEA
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