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Searched refs:LGRL (Results 1 – 14 of 14) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dbranch-folder-hoist-livein.mir22 renamable $r1d = LGRL @b :: (load 4 from got, align 8)
25 renamable $r3d = LGRL @d :: (load 4 from got, align 8)
Dtls-01.ll9 ; matter whether we use LARL/AG or LGRL/AGR for the last part.
Dmemcpy-02.ll323 ; Test that we use LGRL for i64.
Dspill-01.ll354 ; Likewise LGRL and STGRL.
/external/llvm/test/CodeGen/SystemZ/
Dtls-01.ll9 ; matter whether we use LARL/AG or LGRL/AGR for the last part.
Dmemcpy-02.ll323 ; Test that we use LGRL for i64.
Dspill-01.ll354 ; Likewise LGRL and STGRL.
/external/v8/src/s390/
Dsimulator-s390.h658 EVALUATE(LGRL);
Dconstants-s390.h742 V(lgrl, LGRL, 0xC48) /* type = RIL_B LOAD RELATIVE LONG (64) */ \
Dsimulator-s390.cc949 EvalTable[LGRL] = &Simulator::Evaluate_LGRL; in EvalTableInit()
4957 EVALUATE(LGRL) { in EVALUATE() argument
/external/capstone/arch/SystemZ/
DSystemZGenAsmWriter.inc625 11541095U, // LGRL
DSystemZGenDisassemblerTables.inc938 /* 398 */ MCD_OPC_Decode, 220, 4, 92, // Opcode: LGRL
/external/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.td512 def LGRL : UnaryRILPC<"lgrl", 0xC48, aligned_load, GR64>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.td424 def LGRL : UnaryRILPC<"lgrl", 0xC48, aligned_load, GR64>;