Searched refs:LHSR (Results 1 – 8 of 8) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1004 RegisterSDNode *LHSR = dyn_cast<RegisterSDNode>(N.getOperand(0)); in SelectThumbAddrModeRI() local
1006 if ((LHSR && LHSR->getReg() == ARM::SP) || in SelectThumbAddrModeRI()
1069 RegisterSDNode *LHSR = dyn_cast<RegisterSDNode>(N.getOperand(0)); in SelectThumbAddrModeImm5S() local
1071 if ((LHSR && LHSR->getReg() == ARM::SP) || in SelectThumbAddrModeImm5S()
1129 RegisterSDNode *LHSR = dyn_cast<RegisterSDNode>(N.getOperand(0)); in SelectThumbAddrModeSP() local
1131 (LHSR && LHSR->getReg() == ARM::SP)) { in SelectThumbAddrModeSP()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 2432 if (ConstantSDNode *LHSR = dyn_cast<ConstantSDNode>(N0.getOperand(1))) { in SimplifySetCC() local
2437 LHSR->getAPIntValue(), in SimplifySetCC()
2445 if (DAG.MaskedValueIsZero(N0.getOperand(0), ~LHSR->getAPIntValue())) in SimplifySetCC()
2448 DAG.getConstant(LHSR->getAPIntValue() ^ in SimplifySetCC()
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| D | SelectionDAGBuilder.cpp | 2191 CaseRange LHSR(CR.Range.first, Pivot); in handleBTSplitSwitchCase() local
2202 if ((LHSR.second - LHSR.first) == 1 && in handleBTSplitSwitchCase()
2203 LHSR.first->High == CR.GE && in handleBTSplitSwitchCase()
2206 TrueBB = LHSR.first->BB; in handleBTSplitSwitchCase()
2210 WorkList.push_back(CaseRec(TrueBB, C, CR.GE, LHSR)); in handleBTSplitSwitchCase()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 2032 if (auto *LHSR = dyn_cast<ConstantSDNode>(N0.getOperand(1))) { in SimplifySetCC() local
2037 LHSR->getAPIntValue(), in SimplifySetCC()
2045 if (DAG.MaskedValueIsZero(N0.getOperand(0), ~LHSR->getAPIntValue())) in SimplifySetCC()
2048 DAG.getConstant(LHSR->getAPIntValue() ^ in SimplifySetCC()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 2666 if (auto *LHSR = dyn_cast<ConstantSDNode>(N0.getOperand(1))) { in SimplifySetCC() local
2671 LHSR->getAPIntValue(), in SimplifySetCC()
2679 if (DAG.MaskedValueIsZero(N0.getOperand(0), ~LHSR->getAPIntValue())) in SimplifySetCC()
2682 DAG.getConstant(LHSR->getAPIntValue() ^ in SimplifySetCC()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1246 RegisterSDNode *LHSR = dyn_cast<RegisterSDNode>(N.getOperand(0)); in SelectThumbAddrModeSP() local
1248 (LHSR && LHSR->getReg() == ARM::SP)) { in SelectThumbAddrModeSP()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1120 RegisterSDNode *LHSR = dyn_cast<RegisterSDNode>(N.getOperand(0)); in SelectThumbAddrModeSP() local
1122 (LHSR && LHSR->getReg() == ARM::SP)) { in SelectThumbAddrModeSP()
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| /external/clang/lib/AST/ |
| D | ASTContext.cpp | 4676 FloatingRank LHSR = getFloatingRank(LHS); in getFloatingTypeOrder() local
4679 if (LHSR == RHSR) in getFloatingTypeOrder()
4681 if (LHSR > RHSR) in getFloatingTypeOrder()
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