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Searched refs:LLT (Results 1 – 25 of 94) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86LegalizerInfo.cpp90 const LLT p0 = LLT::pointer(0, TM.getPointerSizeInBits(0)); in setLegalizerInfo32bit()
91 const LLT s1 = LLT::scalar(1); in setLegalizerInfo32bit()
92 const LLT s8 = LLT::scalar(8); in setLegalizerInfo32bit()
93 const LLT s16 = LLT::scalar(16); in setLegalizerInfo32bit()
94 const LLT s32 = LLT::scalar(32); in setLegalizerInfo32bit()
95 const LLT s64 = LLT::scalar(64); in setLegalizerInfo32bit()
96 const LLT s128 = LLT::scalar(128); in setLegalizerInfo32bit()
178 const LLT p0 = LLT::pointer(0, TM.getPointerSizeInBits(0)); in setLegalizerInfo64bit()
179 const LLT s1 = LLT::scalar(1); in setLegalizerInfo64bit()
180 const LLT s8 = LLT::scalar(8); in setLegalizerInfo64bit()
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DX86InstructionSelector.cpp73 unsigned getLoadStoreOp(const LLT &Ty, const RegisterBank &RB, unsigned Opc,
127 const TargetRegisterClass *getRegClass(LLT Ty, const RegisterBank &RB) const;
128 const TargetRegisterClass *getRegClass(LLT Ty, unsigned Reg,
169 X86InstructionSelector::getRegClass(LLT Ty, const RegisterBank &RB) const { in getRegClass()
197 X86InstructionSelector::getRegClass(LLT Ty, unsigned Reg, in getRegClass()
391 unsigned X86InstructionSelector::getLoadStoreOp(const LLT &Ty, in getLoadStoreOp()
400 if (Ty == LLT::scalar(8)) { in getLoadStoreOp()
403 } else if (Ty == LLT::scalar(16)) { in getLoadStoreOp()
406 } else if (Ty == LLT::scalar(32) || Ty == LLT::pointer(0, 32)) { in getLoadStoreOp()
414 } else if (Ty == LLT::scalar(64) || Ty == LLT::pointer(0, 64)) { in getLoadStoreOp()
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DX86RegisterBankInfo.cpp64 X86GenRegisterBankInfo::getPartialMappingIdx(const LLT &Ty, bool isFP) { in getPartialMappingIdx()
149 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in getSameOperandsMapping()
206 const LLT Ty0 = MRI.getType(Op0.getReg()); in getInstrMapping()
207 const LLT Ty1 = MRI.getType(Op1.getReg()); in getInstrMapping()
216 const LLT Ty0 = MRI.getType(Op0.getReg()); in getInstrMapping()
217 const LLT Ty1 = MRI.getType(Op1.getReg()); in getInstrMapping()
/external/swiftshader/third_party/llvm-7.0/llvm/unittests/CodeGen/GlobalISel/
DLegalizerInfoTest.cpp38 operator<<(std::ostream &OS, const llvm::LLT Ty) { in operator <<()
56 L.setAction({Op, 0, LLT::scalar(Size)}, Legal); in TEST()
65 ASSERT_EQ(L.getAction({opcode, {LLT::scalar(8)}}), in TEST()
66 LegalizeActionStep(WidenScalar, 0, LLT::scalar(32))); in TEST()
67 ASSERT_EQ(L.getAction({opcode, {LLT::scalar(16)}}), in TEST()
68 LegalizeActionStep(WidenScalar, 0, LLT::scalar(32))); in TEST()
69 ASSERT_EQ(L.getAction({opcode, {LLT::scalar(32)}}), in TEST()
70 LegalizeActionStep(Legal, 0, LLT{})); in TEST()
71 ASSERT_EQ(L.getAction({opcode, {LLT::scalar(64)}}), in TEST()
72 LegalizeActionStep(Legal, 0, LLT{})); in TEST()
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DPatternMatchTest.cpp137 auto MIBCst = B.buildConstant(LLT::scalar(64), 42); in TEST()
158 LLT s64 = LLT::scalar(64); in TEST()
243 LLT s32 = LLT::scalar(32); in TEST()
287 LLT s32 = LLT::scalar(32); in TEST()
316 LLT s64 = LLT::scalar(64); in TEST()
328 LLT s16 = LLT::scalar(16); in TEST()
356 LLT s64 = LLT::scalar(64); in TEST()
357 LLT s32 = LLT::scalar(32); in TEST()
414 LLT s64 = LLT::scalar(64); in TEST()
415 LLT s32 = LLT::scalar(32); in TEST()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Support/
DLowLevelType.cpp19 LLT::LLT(MVT VT) { in LLT() function in LLT
37 void LLT::print(raw_ostream &OS) const { in print()
49 const constexpr LLT::BitFieldInfo LLT::ScalarSizeFieldInfo;
50 const constexpr LLT::BitFieldInfo LLT::PointerSizeFieldInfo;
51 const constexpr LLT::BitFieldInfo LLT::PointerAddressSpaceFieldInfo;
52 const constexpr LLT::BitFieldInfo LLT::VectorElementsFieldInfo;
53 const constexpr LLT::BitFieldInfo LLT::VectorSizeFieldInfo;
54 const constexpr LLT::BitFieldInfo LLT::PointerVectorElementsFieldInfo;
55 const constexpr LLT::BitFieldInfo LLT::PointerVectorSizeFieldInfo;
56 const constexpr LLT::BitFieldInfo LLT::PointerVectorAddressSpaceFieldInfo;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPULegalizerInfo.cpp32 return LLT::pointer(AS, TM.getPointerSizeInBits(AS)); in AMDGPULegalizerInfo()
37 const LLT S1 = LLT::scalar(1); in AMDGPULegalizerInfo()
38 const LLT V2S16 = LLT::vector(2, 16); in AMDGPULegalizerInfo()
40 const LLT S32 = LLT::scalar(32); in AMDGPULegalizerInfo()
41 const LLT S64 = LLT::scalar(64); in AMDGPULegalizerInfo()
42 const LLT S512 = LLT::scalar(512); in AMDGPULegalizerInfo()
44 const LLT GlobalPtr = GetAddrSpacePtr(AMDGPUAS::GLOBAL_ADDRESS); in AMDGPULegalizerInfo()
45 const LLT ConstantPtr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS); in AMDGPULegalizerInfo()
46 const LLT LocalPtr = GetAddrSpacePtr(AMDGPUAS::LOCAL_ADDRESS); in AMDGPULegalizerInfo()
47 const LLT FlatPtr = GetAddrSpacePtr(AMDGPUAS.FLAT_ADDRESS); in AMDGPULegalizerInfo()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64LegalizerInfo.cpp31 const LLT p0 = LLT::pointer(0, 64); in AArch64LegalizerInfo()
32 const LLT s1 = LLT::scalar(1); in AArch64LegalizerInfo()
33 const LLT s8 = LLT::scalar(8); in AArch64LegalizerInfo()
34 const LLT s16 = LLT::scalar(16); in AArch64LegalizerInfo()
35 const LLT s32 = LLT::scalar(32); in AArch64LegalizerInfo()
36 const LLT s64 = LLT::scalar(64); in AArch64LegalizerInfo()
37 const LLT s128 = LLT::scalar(128); in AArch64LegalizerInfo()
38 const LLT s256 = LLT::scalar(256); in AArch64LegalizerInfo()
39 const LLT s512 = LLT::scalar(512); in AArch64LegalizerInfo()
40 const LLT v16s8 = LLT::vector(16, 8); in AArch64LegalizerInfo()
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DAArch64InstructionSelector.cpp142 getRegClassForTypeOnBank(LLT Ty, const RegisterBank &RB, in getRegClassForTypeOnBank()
180 LLT Ty = MRI.getType(I.getOperand(0).getReg()); in unsupportedBinOp()
428 static unsigned selectFPConvOpc(unsigned GenericOpc, LLT DstTy, LLT SrcTy) { in selectFPConvOpc()
721 const LLT DefTy = MRI.getType(DefReg); in select()
765 LLT Ty = in select()
766 I.getOperand(0).isReg() ? MRI.getType(I.getOperand(0).getReg()) : LLT{}; in select()
803 const LLT s32 = LLT::scalar(32); in select()
804 const LLT s64 = LLT::scalar(64); in select()
805 const LLT p0 = LLT::pointer(0, 64); in select()
808 const LLT DefTy = MRI.getType(DefReg); in select()
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DAArch64CallLowering.cpp64 unsigned AddrReg = MRI.createGenericVirtualRegister(LLT::pointer(0, 64)); in getStackAddress()
80 auto Copy = MIRBuilder.buildCopy(LLT{VA.getLocVT()}, PhysReg); in assignValueToReg()
134 LLT p0 = LLT::pointer(0, 64); in getStackAddress()
135 LLT s64 = LLT::scalar(64); in getStackAddress()
160 ValVReg = MIRBuilder.buildAnyExt(LLT::scalar(Size * 8), ValVReg) in assignValueToAddress()
242 VReg = MIRBuilder.buildZExt(LLT::scalar(8), VReg)->getOperand(0).getReg(); in lowerReturn()
281 LLT Ty = MRI.getType(VRegs[i]); in lowerFormalArguments()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Support/
DLowLevelTypeImpl.h40 class LLT {
43 static LLT scalar(unsigned SizeInBits) { in scalar()
45 return LLT{/*isPointer=*/false, /*isVector=*/false, /*NumElements=*/0, in scalar()
50 static LLT pointer(uint16_t AddressSpace, unsigned SizeInBits) { in pointer()
52 return LLT{/*isPointer=*/true, /*isVector=*/false, /*NumElements=*/0, in pointer()
58 static LLT vector(uint16_t NumElements, unsigned ScalarSizeInBits) { in vector()
61 return LLT{/*isPointer=*/false, /*isVector=*/true, NumElements, in vector()
66 static LLT vector(uint16_t NumElements, LLT ScalarTy) { in vector()
69 return LLT{ScalarTy.isPointer(), /*isVector=*/true, NumElements, in vector()
74 explicit LLT(bool isPointer, bool isVector, uint16_t NumElements, in LLT() function
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/
DLegalizerInfo.h104 LLT Type;
106 InstrAspect(unsigned Opcode, LLT Type) : Opcode(Opcode), Type(Type) {} in InstrAspect()
107 InstrAspect(unsigned Opcode, unsigned Idx, LLT Type) in InstrAspect()
121 ArrayRef<LLT> Types;
132 constexpr LegalityQuery(unsigned Opcode, const ArrayRef<LLT> Types, in LegalityQuery()
135 constexpr LegalityQuery(unsigned Opcode, const ArrayRef<LLT> Types) in LegalityQuery()
150 LLT NewType;
153 const LLT &NewType) in LegalizeActionStep()
164 std::function<std::pair<unsigned, LLT>(const LegalityQuery &)>;
168 LLT Type0;
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DLegalizerHelper.h67 LegalizeResult narrowScalar(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy);
72 LegalizeResult widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
76 LegalizeResult lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
81 LLT NarrowTy);
86 LLT WideTy);
100 void widenScalarSrc(MachineInstr &MI, LLT WideTy, unsigned OpIdx,
106 void widenScalarDst(MachineInstr &MI, LLT WideTy, unsigned OpIdx = 0,
112 void extractParts(unsigned Reg, LLT Ty, int NumParts,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/
DLegalityPredicates.cpp18 LegalityPredicate LegalityPredicates::typeIs(unsigned TypeIdx, LLT Type) { in typeIs()
25 std::initializer_list<LLT> TypesInit) { in typeInSet()
26 SmallVector<LLT, 4> Types = TypesInit; in typeInSet()
34 std::initializer_list<std::pair<LLT, LLT>> TypesInit) { in typePairInSet() argument
35 SmallVector<std::pair<LLT, LLT>, 4> Types = TypesInit; in typePairInSet()
37 std::pair<LLT, LLT> Match = {Query.Types[TypeIdx0], Query.Types[TypeIdx1]}; in typePairInSet()
63 const LLT &QueryTy = Query.Types[TypeIdx]; in narrowerThan()
71 const LLT &QueryTy = Query.Types[TypeIdx]; in widerThan()
78 const LLT &QueryTy = Query.Types[TypeIdx]; in sizeNotPow2()
91 const LLT &QueryTy = Query.Types[TypeIdx]; in numElementsNotPow2()
DMachineIRBuilder.cpp195 const LLT &ValueTy, uint64_t Value) { in materializeGEP()
233 assert(getMRI()->getType(Res) == LLT() || getMRI()->getType(Op) == LLT() || in buildCopy()
240 LLT Ty = getMRI()->getType(Res); in buildConstant()
269 LLT DstTy = getMRI()->getType(Res); in buildFConstant()
387 LLT SrcTy = getMRI()->getType(Src); in buildCast()
388 LLT DstTy = getMRI()->getType(Dst); in buildCast()
440 LLT ResTy = getMRI()->getType(Res); in buildSequence()
441 LLT OpTy = getMRI()->getType(Ops[0]); in buildSequence()
477 LLT Ty = getMRI()->getType(Ops[0]); in buildMerge()
500 LLT Ty = getMRI()->getType(Res[0]); in buildUnmerge()
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DLegalizerInfo.cpp66 return {LegalizeAction::UseLegacyRules, 0, LLT{}}; in apply()
71 std::pair<unsigned, LLT> Mutation = Rule.determineMutation(Query); in apply()
84 return {LegalizeAction::Unsupported, 0, LLT{}}; in apply()
160 const LLT Type = LLT2Action.first; in computeTables()
241 std::pair<LegalizeAction, LLT>
253 static LLT getTypeFromTypeIdx(const MachineInstr &MI, in getTypeFromTypeIdx()
339 return {Legal, 0, LLT{}}; in getAction()
345 SmallVector<LLT, 2> Types; in getAction()
361 LLT Ty = getTypeFromTypeIdx(MI, MRI, i, TypeIdx); in getAction()
479 std::pair<LegalizeAction, LLT>
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DLegalizeMutations.cpp18 LegalizeMutation LegalizeMutations::changeTo(unsigned TypeIdx, LLT Ty) { in changeTo()
37 return std::make_pair(TypeIdx, LLT::scalar(NewSizeInBits)); in widenScalarToNextPow2()
44 const LLT &VecTy = Query.Types[TypeIdx]; in moreElementsToNextPow2()
49 TypeIdx, LLT::vector(NewNumElements, VecTy.getScalarSizeInBits())); in moreElementsToNextPow2()
DLegalizerHelper.cpp70 void LegalizerHelper::extractParts(unsigned Reg, LLT Ty, int NumParts, in extractParts()
175 LLT LLTy = MRI.getType(MI.getOperand(0).getReg()); in libcall()
268 LLT NarrowTy) { in narrowScalar()
308 unsigned CarryIn = MRI.createGenericVirtualRegister(LLT::scalar(1)); in narrowScalar()
313 unsigned CarryOut = MRI.createGenericVirtualRegister(LLT::scalar(1)); in narrowScalar()
371 SegReg = MRI.createGenericVirtualRegister(LLT::scalar(SegSize)); in narrowScalar()
429 SegReg = MRI.createGenericVirtualRegister(LLT::scalar(SegSize)); in narrowScalar()
457 LLT OffsetTy = LLT::scalar( in narrowScalar()
498 LLT OffsetTy = LLT::scalar( in narrowScalar()
594 void LegalizerHelper::widenScalarSrc(MachineInstr &MI, LLT WideTy, in widenScalarSrc()
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/external/swiftshader/third_party/llvm-7.0/llvm/unittests/CodeGen/
DLowLevelTypeTest.cpp22 operator<<(std::ostream &OS, const llvm::LLT Ty) { in operator <<()
38 const LLT Ty = LLT::scalar(S); in TEST()
67 const LLT STy = LLT::scalar(S); in TEST()
68 const LLT VTy = LLT::vector(Elts, S); in TEST()
72 const LLT VSTy = LLT::vector(Elts, STy); in TEST()
112 const LLT Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS)); in TEST()
113 const LLT VTy = LLT::vector(4, Ty); in TEST()
146 const LLT Ty; in TEST()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMRegisterBankInfo.cpp250 LLT LargeTy = MRI.getType(MI.getOperand(1).getReg()); in getInstrMapping()
260 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in getInstrMapping()
273 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in getInstrMapping()
280 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in getInstrMapping()
294 LLT ToTy = MRI.getType(MI.getOperand(0).getReg()); in getInstrMapping()
295 LLT FromTy = MRI.getType(MI.getOperand(1).getReg()); in getInstrMapping()
303 LLT ToTy = MRI.getType(MI.getOperand(0).getReg()); in getInstrMapping()
304 LLT FromTy = MRI.getType(MI.getOperand(1).getReg()); in getInstrMapping()
313 LLT ToTy = MRI.getType(MI.getOperand(0).getReg()); in getInstrMapping()
314 LLT FromTy = MRI.getType(MI.getOperand(1).getReg()); in getInstrMapping()
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DARMLegalizerInfo.cpp70 const LLT p0 = LLT::pointer(0, 32); in ARMLegalizerInfo()
72 const LLT s1 = LLT::scalar(1); in ARMLegalizerInfo()
73 const LLT s8 = LLT::scalar(8); in ARMLegalizerInfo()
74 const LLT s16 = LLT::scalar(16); in ARMLegalizerInfo()
75 const LLT s32 = LLT::scalar(32); in ARMLegalizerInfo()
76 const LLT s64 = LLT::scalar(64); in ARMLegalizerInfo()
341 {MRI.createGenericVirtualRegister(LLT::scalar(32)), OriginalResult}, in legalizeCustom()
372 auto LibcallResult = MRI.createGenericVirtualRegister(LLT::scalar(32)); in legalizeCustom()
397 auto Zero = MRI.createGenericVirtualRegister(LLT::scalar(32)); in legalizeCustom()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DLowLevelType.cpp21 LLT llvm::getLLTForType(Type &Ty, const DataLayout &DL) { in getLLTForType()
24 LLT ScalarTy = getLLTForType(*VTy->getElementType(), DL); in getLLTForType()
27 return LLT::vector(NumElements, ScalarTy); in getLLTForType()
29 return LLT::pointer(PTy->getAddressSpace(), DL.getTypeSizeInBits(&Ty)); in getLLTForType()
35 return LLT::scalar(SizeInBits); in getLLTForType()
37 return LLT(); in getLLTForType()
/external/eigen/Eigen/src/Cholesky/
DLLT.h52 template<typename _MatrixType, int _UpLo> class LLT
80 LLT() : m_matrix(), m_isInitialized(false) {} in LLT() function
88 explicit LLT(Index size) : m_matrix(size, size), in LLT() function
92 explicit LLT(const EigenBase<InputType>& matrix) in LLT() function
107 explicit LLT(EigenBase<InputType>& matrix) in LLT() function
139 inline const Solve<LLT, Rhs>
145 return Solve<LLT, Rhs>(*this, b.derived()); in solve()
152 LLT& compute(const EigenBase<InputType>& matrix);
193 const LLT& adjoint() const { return *this; }; in adjoint()
199 LLT rankUpdate(const VectorType& vec, const RealScalar& sigma = 1);
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsLegalizerInfo.cpp22 const LLT s32 = LLT::scalar(32); in MipsLegalizerInfo()
23 const LLT p0 = LLT::pointer(0, 32); in MipsLegalizerInfo()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/GlobalISel/
DTarget.td20 // Definitions that inherit from LLT define types that will be used in the
22 class LLT;
24 def s32 : LLT;
25 def s64 : LLT;
33 class GIComplexOperandMatcher<LLT type, string matcherfn> {
38 LLT Type = type;

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