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Searched refs:LRU (Results 1 – 24 of 24) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DMachineOutliner.h76 LiveRegUnits LRU; member
141 LRU.init(TRI); in initLRU()
142 LRU.addLiveOuts(*MBB); in initLRU()
147 [this](MachineInstr &MI) { LRU.stepBackward(MI); }); in initLRU()
/external/llvm/lib/CodeGen/
DMachineTraceMetrics.cpp739 LiveRegUnit &LRU = RegUnits[*Units]; in updatePhysDepsDownwards() local
740 LRU.MI = UseMI; in updatePhysDepsDownwards()
741 LRU.Op = DefOp; in updatePhysDepsDownwards()
911 LiveRegUnit &LRU = RegUnits[*Units]; in updatePhysDepsUpwards() local
913 if (LRU.Cycle <= Height && LRU.MI != &MI) { in updatePhysDepsUpwards()
914 LRU.Cycle = Height; in updatePhysDepsUpwards()
915 LRU.MI = &MI; in updatePhysDepsUpwards()
916 LRU.Op = ReadOps[i]; in updatePhysDepsUpwards()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DMachineTraceMetrics.cpp746 LiveRegUnit &LRU = RegUnits[*Units]; in updatePhysDepsDownwards() local
747 LRU.MI = UseMI; in updatePhysDepsDownwards()
748 LRU.Op = DefOp; in updatePhysDepsDownwards()
937 LiveRegUnit &LRU = RegUnits[*Units]; in updatePhysDepsUpwards() local
939 if (LRU.Cycle <= Height && LRU.MI != &MI) { in updatePhysDepsUpwards()
940 LRU.Cycle = Height; in updatePhysDepsUpwards()
941 LRU.MI = &MI; in updatePhysDepsUpwards()
942 LRU.Op = ReadOps[i]; in updatePhysDepsUpwards()
/external/glide/third_party/disklrucache/
DREADME.third_party7 Java implementation of a Disk-based LRU cache which specifically targets Android compatibility.
DREADME.md1 Disk LRU Cache
/external/autotest/site_utils/rpm_control_system/
Drpm_config.ini24 # Size of the LRU that holds power management unit information related
/external/python/cpython3/Doc/library/
Dfunctools.rst60 If *maxsize* is set to ``None``, the LRU feature is disabled and the cache can
61 grow without bound. The LRU feature performs best when *maxsize* is a
81 An `LRU (least recently used) cache
88 In general, the LRU cache should only be used when you want to reuse
93 Example of an LRU cache for static web content::
Dcollections.rst1052 recent accesses (for example in an `LRU cache
1134 class LRU(OrderedDict):
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64InstrInfo.cpp4960 C.LRU.available(Reg) && C.UsedInSequence.available(Reg)) in findRegisterToSaveLRTo()
4995 LiveRegUnits LRU = C.LRU; in getOutliningCandidateInfo() local
4996 return (!LRU.available(AArch64::W16) || !LRU.available(AArch64::W17) || in getOutliningCandidateInfo()
4997 !LRU.available(AArch64::NZCV)); in getOutliningCandidateInfo()
5049 return C.LRU.available(AArch64::LR); in getOutliningCandidateInfo()
5138 LiveRegUnits LRU(getRegisterInfo()); in getMachineOutlinerMBBFlags() local
5139 LRU.addLiveOuts(MBB); in getMachineOutlinerMBBFlags()
5143 [&LRU](MachineInstr &MI) { LRU.accumulate(MI); }); in getMachineOutlinerMBBFlags()
5145 if (!LRU.available(AArch64::LR)) in getMachineOutlinerMBBFlags()
/external/swiftshader/third_party/llvm-7.0/llvm/docs/HistoricalNotes/
D2003-06-25-Reoptimizer1.txt125 replacement policy; we have found that this is almost as good as LRU
/external/swiftshader/third_party/LLVM/docs/HistoricalNotes/
D2003-06-25-Reoptimizer1.txt125 replacement policy; we have found that this is almost as good as LRU
/external/llvm/docs/HistoricalNotes/
D2003-06-25-Reoptimizer1.txt125 replacement policy; we have found that this is almost as good as LRU
/external/tensorflow/tensorflow/core/platform/cloud/
Dram_file_block_cache_test.cc265 TEST(RamFileBlockCacheTest, LRU) { in TEST() argument
/external/bcc/docs/
Dkernel-versions.md95 LRU hash | 4.10 | [`29ba732acbee`](https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/…
96 LRU per-CPU hash | 4.10 | [`8f8449384ec3`](https://git.kernel.org/cgit/linux/kernel/git/torvalds/li…
/external/one-true-awk/
DFIXES556 fixed caching bug in makedfa: LRU was actually removing
/external/jemalloc_new/
DChangeLog103 the LRU list. (@interwq)
/external/freetype/
DChangeLog.20988 correct LRU behaviour.
/external/u-boot/common/
Ddlmalloc.src1246 are taken from the back. This results in LRU or FIFO allocation
/external/python/cpython3/Misc/NEWS.d/
D3.5.0a1.rst2661 The functools LRU Cache decorator factory now gives an earlier and clearer
/external/freetype/docs/
DCHANGES3690 - Fixed a bug in the cache manager that prevented normal LRU
/external/cldr/tools/java/org/unicode/cldr/util/data/external/
D2013-1_UNLOCODE_CodeListPart1.csv24617 "+","DE","LRU","Waldbrunn","Waldbrunn","BY","--3-----","RL","1301",,"4946N 00948E",
28824 ,"ES","LRU","El Rubio","El Rubio","SE","--3-----","RQ","1001",,"3721N 00459W",
36954 ,"FR","LRU","La Rochefoucauld","La Rochefoucauld","16","--3-----","RL","0501",,"4544N 00023E",
D2013-1_UNLOCODE_CodeListPart2.csv21322 ,"NL","LRU","Leimuiderbrug","Leimuiderbrug","NH","1-3-----","RN","0501",,"5214N 00440E",
D2013-1_UNLOCODE_CodeListPart3.csv18304 ,"US","LRU","Las Cruces","Las Cruces","NM","--34----","AI","9601",,,
/external/python/cpython3/Misc/
DHISTORY1506 - Issue #22184: The functools LRU Cache decorator factory now gives an earlier