| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
| D | LaneBitmask.h | 40 struct LaneBitmask { struct
46 constexpr LaneBitmask() = default; argument
47 explicit constexpr LaneBitmask(Type V) : Mask(V) {} in LaneBitmask() argument
49 constexpr bool operator== (LaneBitmask M) const { return Mask == M.Mask; }
50 constexpr bool operator!= (LaneBitmask M) const { return Mask != M.Mask; }
51 constexpr bool operator< (LaneBitmask M) const { return Mask < M.Mask; }
56 constexpr LaneBitmask operator~() const { argument
57 return LaneBitmask(~Mask);
59 constexpr LaneBitmask operator|(LaneBitmask M) const {
60 return LaneBitmask(Mask | M.Mask);
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | DetectDeadLanes.cpp | 54 LaneBitmask UsedLanes;
55 LaneBitmask DefinedLanes;
76 void addUsedLanesOnOperand(const MachineOperand &MO, LaneBitmask UsedLanes);
81 void transferUsedLanesStep(const MachineInstr &MI, LaneBitmask UsedLanes);
87 LaneBitmask DefinedLanes);
92 LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum,
93 LaneBitmask DefinedLanes) const;
97 LaneBitmask transferUsedLanes(const MachineInstr &MI, LaneBitmask UsedLanes,
102 LaneBitmask determineInitialDefinedLanes(unsigned Reg);
103 LaneBitmask determineInitialUsedLanes(unsigned Reg);
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| D | RegisterPressure.cpp | 53 LaneBitmask PrevMask, LaneBitmask NewMask) { in increaseSetPressure()
67 LaneBitmask PrevMask, LaneBitmask NewMask) { in decreaseSetPressure()
141 LaneBitmask PreviousMask, in increaseRegPressure()
142 LaneBitmask NewMask) { in increaseRegPressure()
156 LaneBitmask PreviousMask, in decreaseRegPressure()
157 LaneBitmask NewMask) { in decreaseRegPressure()
352 LaneBitmask::getNone(), Pair.LaneMask); in initLiveThru()
356 static LaneBitmask getRegLanes(ArrayRef<RegisterMaskPair> RegUnits, in getRegLanes()
362 return LaneBitmask::getNone(); in getRegLanes()
386 RegUnits.push_back(RegisterMaskPair(RegUnit, LaneBitmask::getNone())); in setRegZero()
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| D | RegisterCoalescer.cpp | 112 LaneBitmask ShrinkMask;
184 LaneBitmask LaneMask, CoalescerPair &CP);
189 LaneBitmask LaneMask, const CoalescerPair &CP);
854 LaneBitmask Mask = MRI->getMaxLaneMaskForVReg(IntA.reg); in removeCopyByCommutingDef()
1278 LaneBitmask MaxMask = MRI->getMaxLaneMaskForVReg(DstReg); in reMaterializeTrivialDef()
1302 LaneBitmask DstMask = TRI->getSubRegIndexLaneMask(NewIdx); in reMaterializeTrivialDef()
1408 LaneBitmask SrcMask = TRI->getSubRegIndexLaneMask(SrcSubIdx); in eliminateUndefCopy()
1447 LaneBitmask DstMask = TRI->getSubRegIndexLaneMask(DstSubIdx); in eliminateUndefCopy()
1466 LaneBitmask UseMask = TRI->getSubRegIndexLaneMask(MO.getSubReg()); in eliminateUndefCopy()
1501 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(SubRegIdx); in addUndefFlag()
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| /external/llvm/lib/CodeGen/ |
| D | DetectDeadLanes.cpp | 55 LaneBitmask UsedLanes;
56 LaneBitmask DefinedLanes;
77 void addUsedLanesOnOperand(const MachineOperand &MO, LaneBitmask UsedLanes);
82 void transferUsedLanesStep(const MachineInstr &MI, LaneBitmask UsedLanes);
88 LaneBitmask DefinedLanes);
93 LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum,
94 LaneBitmask DefinedLanes) const;
98 LaneBitmask transferUsedLanes(const MachineInstr &MI, LaneBitmask UsedLanes,
103 LaneBitmask determineInitialDefinedLanes(unsigned Reg);
104 LaneBitmask determineInitialUsedLanes(unsigned Reg);
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| D | RegisterPressure.cpp | 28 LaneBitmask PrevMask, LaneBitmask NewMask) { in increaseSetPressure()
42 LaneBitmask PrevMask, LaneBitmask NewMask) { in decreaseSetPressure()
113 LaneBitmask PreviousMask, in increaseRegPressure()
114 LaneBitmask NewMask) { in increaseRegPressure()
128 LaneBitmask PreviousMask, in decreaseRegPressure()
129 LaneBitmask NewMask) { in decreaseRegPressure()
329 static LaneBitmask getRegLanes(ArrayRef<RegisterMaskPair> RegUnits, in getRegLanes()
383 static LaneBitmask getLanesWithProperty(const LiveIntervals &LIS, in getLanesWithProperty()
385 SlotIndex Pos, LaneBitmask SafeDefault, in getLanesWithProperty()
389 LaneBitmask Result = 0; in getLanesWithProperty()
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| D | RegisterCoalescer.cpp | 95 LaneBitmask ShrinkMask;
167 LaneBitmask LaneMask, CoalescerPair &CP);
172 LaneBitmask LaneMask, const CoalescerPair &CP);
806 LaneBitmask Mask = MRI->getMaxLaneMaskForVReg(IntA.reg); in removeCopyByCommutingDef()
814 LaneBitmask AMask = SA.LaneMask; in removeCopyByCommutingDef()
816 LaneBitmask BMask = SB.LaneMask; in removeCopyByCommutingDef()
817 LaneBitmask Common = BMask & AMask; in removeCopyByCommutingDef()
823 LaneBitmask BRest = BMask & ~AMask; in removeCopyByCommutingDef()
1056 LaneBitmask MaxMask = MRI->getMaxLaneMaskForVReg(DstReg); in reMaterializeTrivialDef()
1154 LaneBitmask SrcMask = TRI->getSubRegIndexLaneMask(SrcSubIdx); in eliminateUndefCopy()
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| D | LiveRangeCalc.cpp | 67 LaneBitmask Mask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg) in calculate()
73 LaneBitmask ClassMask = MRI->getMaxLaneMaskForVReg(Reg); in calculate()
79 LaneBitmask Common = S.LaneMask & Mask; in calculate()
83 LaneBitmask LRest = S.LaneMask & ~Mask; in calculate()
158 LaneBitmask Mask) { in extendToUses()
177 LaneBitmask SubRegMask = TRI.getSubRegIndexLaneMask(SubReg); in extendToUses()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | RegisterPressure.h | 42 LaneBitmask LaneMask;
44 RegisterMaskPair(unsigned RegUnit, LaneBitmask LaneMask) in RegisterMaskPair()
266 LaneBitmask LaneMask;
268 IndexMaskPair(unsigned Index, LaneBitmask LaneMask)
297 LaneBitmask contains(unsigned Reg) const {
301 return LaneBitmask::getNone();
307 LaneBitmask insert(RegisterMaskPair Pair) {
311 LaneBitmask PrevMask = InsertRes.first->LaneMask;
315 return LaneBitmask::getNone();
320 LaneBitmask erase(RegisterMaskPair Pair) {
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| D | TargetRegisterInfo.h | 55 const LaneBitmask LaneMask;
195 LaneBitmask getLaneMask() const { in getLaneMask()
232 const LaneBitmask *SubRegIndexLaneMasks;
235 LaneBitmask CoveringLanes;
244 const LaneBitmask *SRILaneMasks,
245 LaneBitmask CoveringLanes,
391 LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const { in getSubRegIndexLaneMask()
419 LaneBitmask getCoveringLanes() const { return CoveringLanes; } in getCoveringLanes()
597 LaneBitmask composeSubRegIndexLaneMask(unsigned IdxA, in composeSubRegIndexLaneMask()
598 LaneBitmask Mask) const { in composeSubRegIndexLaneMask()
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| D | ScheduleDAGInstrs.h | 54 LaneBitmask LaneMask;
57 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit()
69 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask, in VReg2SUnitOperIdx()
360 LaneBitmask getLaneMaskForMO(const MachineOperand &MO) const;
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| D | MachineBasicBlock.h | 75 LaneBitmask LaneMask;
77 RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask)
306 LaneBitmask LaneMask = LaneBitmask::getAll()) {
328 LaneBitmask LaneMask = LaneBitmask::getAll());
332 LaneBitmask LaneMask = LaneBitmask::getAll()) const;
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenRegisterInfo.inc | 866 extern const LaneBitmask ARMLaneMaskLists[] = {
867 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
868 /* 2 */ LaneBitmask(0x00000002), LaneBitmask(0x00000001), LaneBitmask::getAll(),
869 /* 5 */ LaneBitmask(0x00000001), LaneBitmask(0x00000002), LaneBitmask::getAll(),
870 /* 8 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask::getAll(),
871 …/* 11 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask(0x…
872 …/* 16 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000030), LaneBitmask::g…
873 /* 20 */ LaneBitmask(0x0000000C), LaneBitmask(0x00000030), LaneBitmask::getAll(),
874 …/* 23 */ LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000040), LaneBitmask(0x…
875 …LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x00000010), LaneBitmask(0x00000020)…
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | RDFRegisters.cpp | 57 UnitInfos[U].Mask = LaneBitmask::getAll(); in PhysicalRegisterInfo()
61 std::pair<uint32_t,LaneBitmask> P = *I; in PhysicalRegisterInfo()
70 UI.Mask = LaneBitmask::getAll(); in PhysicalRegisterInfo()
141 std::pair<RegisterId,LaneBitmask> PA = *UMA; in aliasRR()
147 std::pair<RegisterId,LaneBitmask> PB = *UMB; in aliasRR()
170 if (RR.Mask == LaneBitmask::getAll()) in aliasRM()
181 LaneBitmask M = RR.Mask; in aliasRM()
183 LaneBitmask SM = TRI.getSubRegIndexLaneMask(SI.getSubRegIndex()); in aliasRM()
233 LaneBitmask RCM = RI.RegClass ? RI.RegClass->LaneMask in mapTo()
234 : LaneBitmask::getAll(); in mapTo()
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| D | RDFRegisters.h | 74 LaneBitmask Mask = LaneBitmask::getNone();
77 explicit RegisterRef(RegisterId R, LaneBitmask M = LaneBitmask::getAll())
78 : Reg(R), Mask(R != 0 ? M : LaneBitmask::getNone()) {} in Reg()
141 LaneBitmask Mask;
186 using MapType = std::map<RegisterId, LaneBitmask>;
232 PrintLaneMaskOpt(LaneBitmask M) : Mask(M) {} in PrintLaneMaskOpt()
233 LaneBitmask Mask;
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 53 typedef unsigned LaneBitmask; typedef
67 const LaneBitmask LaneMask;
231 LaneBitmask getLaneMask() const { in getLaneMask()
263 const LaneBitmask *SubRegIndexLaneMasks;
273 const LaneBitmask *SRILaneMasks,
380 LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const { in getSubRegIndexLaneMask()
408 LaneBitmask getCoveringLanes() const { return CoveringLanes; } in getCoveringLanes()
563 LaneBitmask composeSubRegIndexLaneMask(unsigned IdxA, in composeSubRegIndexLaneMask()
564 LaneBitmask Mask) const { in composeSubRegIndexLaneMask()
577 LaneBitmask reverseComposeSubRegIndexLaneMask(unsigned IdxA, in reverseComposeSubRegIndexLaneMask()
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| /external/llvm/include/llvm/CodeGen/ |
| D | RegisterPressure.h | 31 LaneBitmask LaneMask;
33 RegisterMaskPair(unsigned RegUnit, LaneBitmask LaneMask) in RegisterMaskPair()
247 LaneBitmask LaneMask;
249 IndexMaskPair(unsigned Index, LaneBitmask LaneMask)
277 LaneBitmask contains(unsigned Reg) const {
287 LaneBitmask insert(RegisterMaskPair Pair) {
300 LaneBitmask erase(RegisterMaskPair Pair) {
538 void increaseRegPressure(unsigned RegUnit, LaneBitmask PreviousMask,
539 LaneBitmask NewMask);
540 void decreaseRegPressure(unsigned RegUnit, LaneBitmask PreviousMask,
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| D | ScheduleDAGInstrs.h | 37 LaneBitmask LaneMask;
40 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit()
52 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask, in VReg2SUnitOperIdx()
335 LaneBitmask getLaneMaskForMO(const MachineOperand &MO) const;
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenRegisterInfo.inc | 1046 extern const LaneBitmask AArch64LaneMaskLists[] = {
1047 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
1048 /* 2 */ LaneBitmask(0x00000080), LaneBitmask(0x00000001), LaneBitmask::getAll(),
1049 …/* 5 */ LaneBitmask(0x00000080), LaneBitmask(0x00000200), LaneBitmask(0x00000100), LaneBitmask(0x0…
1050 …/* 10 */ LaneBitmask(0x00000080), LaneBitmask(0x00000200), LaneBitmask(0x00000001), LaneBitmask::g…
1051 /* 14 */ LaneBitmask(0x00000400), LaneBitmask(0x00000001), LaneBitmask::getAll(),
1052 …/* 17 */ LaneBitmask(0x00000400), LaneBitmask(0x00001000), LaneBitmask(0x00000800), LaneBitmask(0x…
1053 …/* 22 */ LaneBitmask(0x00000400), LaneBitmask(0x00001000), LaneBitmask(0x00000001), LaneBitmask::g…
1054 /* 26 */ LaneBitmask(0x00002000), LaneBitmask(0x00000008), LaneBitmask::getAll(),
1055 /* 29 */ LaneBitmask(0x00000020), LaneBitmask(0x00000010), LaneBitmask::getAll(),
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIFormMemoryClauses.cpp | 41 typedef DenseMap<unsigned, std::pair<unsigned, LaneBitmask>> RegUse;
65 void forAllLanes(unsigned Reg, LaneBitmask LaneMask, Callable Func) const;
143 void SIFormMemoryClauses::forAllLanes(unsigned Reg, LaneBitmask LaneMask, in forAllLanes()
158 LaneBitmask SubRegMask = TRI->getSubRegIndexLaneMask(Idx); in forAllLanes()
173 LaneBitmask MaskA = TRI->getSubRegIndexLaneMask(A); in forAllLanes()
174 LaneBitmask MaskB = TRI->getSubRegIndexLaneMask(B); in forAllLanes()
183 LaneBitmask SubRegMask = TRI->getSubRegIndexLaneMask(Idx); in forAllLanes()
224 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(MO.getSubReg()); in canBundle()
263 LaneBitmask Mask = TargetRegisterInfo::isVirtualRegister(Reg) ? in collectRegUses()
265 LaneBitmask::getAll(); in collectRegUses()
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| D | GCNRegPressure.h | 58 LaneBitmask PrevMask,
59 LaneBitmask NewMask,
98 using LiveRegSet = DenseMap<unsigned, LaneBitmask>;
185 LaneBitmask getLiveLaneMask(unsigned Reg,
211 Res.inc(RM.first, LaneBitmask::getNone(), RM.second, MRI); in getRegPressure()
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| D | GCNRegPressure.cpp | 96 LaneBitmask PrevMask, in inc()
97 LaneBitmask NewMask, in inc()
193 static LaneBitmask getDefRegMask(const MachineOperand &MO, in getDefRegMask()
206 static LaneBitmask getUsedRegMask(const MachineOperand &MO, in getUsedRegMask()
216 if (MaxMask == LaneBitmask::getLane(0)) // cannot have subregs in getUsedRegMask()
253 LaneBitmask llvm::getLiveLaneMask(unsigned Reg, in getLiveLaneMask()
257 LaneBitmask LiveMask; in getLiveLaneMask()
388 It.second = LaneBitmask::getNone(); in advanceBeforeNext()
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenRegisterInfo.inc | 655 extern const LaneBitmask MipsLaneMaskLists[] = {
656 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
657 /* 2 */ LaneBitmask(0x00000001), LaneBitmask::getAll(),
658 …/* 4 */ LaneBitmask(0x00000002), LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask(0x0…
659 /* 10 */ LaneBitmask(0x00000001), LaneBitmask(0x00000040), LaneBitmask::getAll(),
3730 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3731 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3860 static const LaneBitmask SubRegIndexLaneMaskTable[] = {
3861 LaneBitmask::getAll(),
3862 LaneBitmask(0x00000001), // sub_32
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
| D | X86GenRegisterInfo.inc | 521 extern const LaneBitmask X86LaneMaskLists[] = {
522 /* 0 */ LaneBitmask(0x00000000), LaneBitmask::getAll(),
523 /* 2 */ LaneBitmask(0x00000002), LaneBitmask(0x00000001), LaneBitmask::getAll(),
524 /* 5 */ LaneBitmask(0x00000001), LaneBitmask(0x00000004), LaneBitmask::getAll(),
525 …/* 8 */ LaneBitmask(0x00000002), LaneBitmask(0x00000001), LaneBitmask(0x00000008), LaneBitmask::ge…
526 …/* 12 */ LaneBitmask(0x00000001), LaneBitmask(0x00000004), LaneBitmask(0x00000008), LaneBitmask::g…
527 /* 16 */ LaneBitmask(0x00000007), LaneBitmask(0x00000008), LaneBitmask::getAll(),
528 /* 19 */ LaneBitmask(0x00000010), LaneBitmask::getAll(),
3877 LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
3878 LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override;
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| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | CodeGenRegisters.h | 52 LaneBitmask Mask;
73 mutable LaneBitmask LaneMask;
133 LaneBitmask computeLaneMask() const;
226 typedef SmallVector<LaneBitmask, 16> RegUnitLaneMaskList;
235 ArrayRef<LaneBitmask> getRegUnitLaneMasks() const { in getRegUnitLaneMasks()
335 LaneBitmask LaneMask;
772 LaneBitmask CoveringLanes;
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