| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | RegisterPressure.h | 42 LaneBitmask LaneMask; member
44 RegisterMaskPair(unsigned RegUnit, LaneBitmask LaneMask) in RegisterMaskPair()
45 : RegUnit(RegUnit), LaneMask(LaneMask) {} in RegisterMaskPair()
266 LaneBitmask LaneMask;
268 IndexMaskPair(unsigned Index, LaneBitmask LaneMask)
269 : Index(Index), LaneMask(LaneMask) {}
302 return I->LaneMask;
309 auto InsertRes = Regs.insert(IndexMaskPair(SparseIndex, Pair.LaneMask));
311 LaneBitmask PrevMask = InsertRes.first->LaneMask;
312 InsertRes.first->LaneMask |= Pair.LaneMask;
[all …]
|
| D | LiveInterval.h | 648 LaneBitmask LaneMask; variable
651 SubRange(LaneBitmask LaneMask) : LaneMask(LaneMask) {} in SubRange() argument
654 SubRange(LaneBitmask LaneMask, const LiveRange &Other, in SubRange() argument
656 : LiveRange(Other, Allocator), LaneMask(LaneMask) {} in SubRange()
734 LaneBitmask LaneMask) { in createSubRange() argument
735 SubRange *Range = new (Allocator) SubRange(LaneMask); in createSubRange()
743 LaneBitmask LaneMask, in createSubRangeFrom() argument
745 SubRange *Range = new (Allocator) SubRange(LaneMask, CopyFrom, Allocator); in createSubRangeFrom()
779 LaneBitmask LaneMask,
793 void refineSubRanges(BumpPtrAllocator &Allocator, LaneBitmask LaneMask,
|
| D | ScheduleDAGInstrs.h | 54 LaneBitmask LaneMask; member
57 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit()
58 : VirtReg(VReg), LaneMask(LaneMask), SU(SU) {} in VReg2SUnit()
69 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask, in VReg2SUnitOperIdx()
71 : VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {} in VReg2SUnitOperIdx()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | RegisterPressure.h | 31 LaneBitmask LaneMask; member
33 RegisterMaskPair(unsigned RegUnit, LaneBitmask LaneMask) in RegisterMaskPair()
34 : RegUnit(RegUnit), LaneMask(LaneMask) {} in RegisterMaskPair()
247 LaneBitmask LaneMask;
249 IndexMaskPair(unsigned Index, LaneBitmask LaneMask)
250 : Index(Index), LaneMask(LaneMask) {}
282 return I->LaneMask;
289 auto InsertRes = Regs.insert(IndexMaskPair(SparseIndex, Pair.LaneMask));
291 unsigned PrevMask = InsertRes.first->LaneMask;
292 InsertRes.first->LaneMask |= Pair.LaneMask;
[all …]
|
| D | ScheduleDAGInstrs.h | 37 LaneBitmask LaneMask; member
40 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit()
41 : VirtReg(VReg), LaneMask(LaneMask), SU(SU) {} in VReg2SUnit()
52 VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask, in VReg2SUnitOperIdx()
54 : VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {} in VReg2SUnitOperIdx()
|
| D | LiveInterval.h | 604 LaneBitmask LaneMask; variable
607 SubRange(LaneBitmask LaneMask) in SubRange() argument
608 : Next(nullptr), LaneMask(LaneMask) { in SubRange()
612 SubRange(LaneBitmask LaneMask, const LiveRange &Other, in SubRange() argument
614 : LiveRange(Other, Allocator), Next(nullptr), LaneMask(LaneMask) { in SubRange()
690 LaneBitmask LaneMask) { in createSubRange() argument
691 SubRange *Range = new (Allocator) SubRange(LaneMask); in createSubRange()
699 LaneBitmask LaneMask, in createSubRangeFrom() argument
701 SubRange *Range = new (Allocator) SubRange(LaneMask, CopyFrom, Allocator); in createSubRangeFrom()
|
| D | MachineBasicBlock.h | 79 LaneBitmask LaneMask;
81 RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask)
82 : PhysReg(PhysReg), LaneMask(LaneMask) {}
288 void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask = ~0u) {
289 LiveIns.push_back(RegisterMaskPair(PhysReg, LaneMask));
306 void removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask = ~0u);
309 bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask = ~0u) const;
|
| /external/llvm/lib/CodeGen/ |
| D | MachineVerifier.cpp | 217 LaneBitmask LaneMask) const;
222 void report_context_lanemask(LaneBitmask LaneMask) const;
231 LaneBitmask LaneMask = 0);
234 LaneBitmask LaneMask = 0);
249 void verifyLiveRange(const LiveRange&, unsigned, LaneBitmask LaneMask = 0);
478 LaneBitmask LaneMask) const { in report_context()
481 if (LaneMask != 0) in report_context()
482 report_context_lanemask(LaneMask); in report_context()
509 void MachineVerifier::report_context_lanemask(LaneBitmask LaneMask) const { in report_context_lanemask()
510 errs() << "- lanemask: " << PrintLaneMask(LaneMask) << '\n'; in report_context_lanemask()
[all …]
|
| D | RegisterPressure.cpp | 76 if (P.LaneMask != ~0u) in dump()
77 dbgs() << ':' << PrintLaneMask(P.LaneMask); in dump()
84 if (P.LaneMask != ~0u) in dump()
85 dbgs() << ':' << PrintLaneMask(P.LaneMask); in dump()
325 increaseSetPressure(LiveThruPressure, *MRI, RegUnit, 0, Pair.LaneMask); in initLiveThru()
337 return I->LaneMask; in getRegLanes()
343 assert(Pair.LaneMask != 0); in addRegLanes()
351 I->LaneMask |= Pair.LaneMask; in addRegLanes()
364 I->LaneMask = 0; in setRegZero()
371 assert(Pair.LaneMask != 0); in removeRegLanes()
[all …]
|
| D | RegisterCoalescer.cpp | 167 LaneBitmask LaneMask, CoalescerPair &CP);
172 LaneBitmask LaneMask, const CoalescerPair &CP);
814 LaneBitmask AMask = SA.LaneMask; in removeCopyByCommutingDef()
816 LaneBitmask BMask = SB.LaneMask; in removeCopyByCommutingDef()
826 SB.LaneMask = BRest; in removeCopyByCommutingDef()
833 SB.LaneMask = Common; in removeCopyByCommutingDef()
1031 SR.LaneMask = TRI->composeSubRegIndexLaneMask(DstIdx, SR.LaneMask); in reMaterializeTrivialDef()
1061 MaxMask &= ~SR.LaneMask; in reMaterializeTrivialDef()
1156 if ((SR.LaneMask & SrcMask) == 0) in eliminateUndefCopy()
1177 if ((SR.LaneMask & DstMask) == 0) in eliminateUndefCopy()
[all …]
|
| D | RenameIndependentSubregs.cpp | 183 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in findComponents() local
187 if ((SR.LaneMask & LaneMask) == 0) in findComponents()
226 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in rewriteOperands() local
231 if ((SR.LaneMask & LaneMask) == 0) in rewriteOperands()
273 SubRanges[ID-1] = Intervals[ID]->createSubRange(Allocator, SR.LaneMask); in distribute()
|
| D | ScheduleDAGInstrs.cpp | 451 LaneBitmask LaneMask = I->LaneMask; in addVRegDefDeps() local
453 if ((LaneMask & KillLaneMask) == 0) { in addVRegDefDeps()
458 if ((LaneMask & DefLaneMask) != 0) { in addVRegDefDeps()
468 LaneMask &= ~KillLaneMask; in addVRegDefDeps()
470 if (LaneMask != 0) { in addVRegDefDeps()
471 I->LaneMask = LaneMask; in addVRegDefDeps()
489 LaneBitmask LaneMask = DefLaneMask; in addVRegDefDeps() local
493 if ((V2SU.LaneMask & LaneMask) == 0) in addVRegDefDeps()
512 LaneBitmask OverlapMask = V2SU.LaneMask & LaneMask; in addVRegDefDeps()
513 LaneBitmask NonOverlapMask = V2SU.LaneMask & ~LaneMask; in addVRegDefDeps()
[all …]
|
| D | LiveIntervalAnalysis.cpp | 524 LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg); in shrinkToUses() local
525 if ((LaneMask & SR.LaneMask) == 0) in shrinkToUses()
737 DefinedLanesMask |= SR.LaneMask; in addKillFlags()
957 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubReg); in updateAllRanges() local
959 if ((S.LaneMask & LaneMask) == 0) in updateAllRanges()
961 updateRange(S, Reg, S.LaneMask); in updateAllRanges()
981 void updateRange(LiveRange &LR, unsigned Reg, LaneBitmask LaneMask) { in updateRange() argument
988 if (LaneMask != 0) in updateRange()
989 dbgs() << " L" << PrintLaneMask(LaneMask); in updateRange()
998 handleMoveUp(LR, Reg, LaneMask); in updateRange()
[all …]
|
| D | MachineBasicBlock.cpp | 281 if (LI.LaneMask != ~0u) in print()
282 OS << ':' << PrintLaneMask(LI.LaneMask); in print()
325 void MachineBasicBlock::removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) { in removeLiveIn() argument
332 I->LaneMask &= ~LaneMask; in removeLiveIn()
333 if (I->LaneMask == 0) in removeLiveIn()
337 bool MachineBasicBlock::isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) const { in isLiveIn()
341 return I != livein_end() && (I->LaneMask & LaneMask) != 0; in isLiveIn()
355 LaneBitmask LaneMask = I->LaneMask; in sortUniqueLiveIns() local
357 LaneMask |= J->LaneMask; in sortUniqueLiveIns()
359 Out->LaneMask = LaneMask; in sortUniqueLiveIns()
|
| D | VirtRegMap.cpp | 269 LaneBitmask LaneMask = 0; in addLiveInsForSubRanges() local
278 LaneMask |= SR->LaneMask; in addLiveInsForSubRanges()
280 if (LaneMask == 0) in addLiveInsForSubRanges()
283 MBB->addLiveIn(PhysReg, LaneMask); in addLiveInsForSubRanges()
344 if ((SR.LaneMask & UseMask) != 0 && SR.liveAt(BaseIndex)) in readsUndefSubreg()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | RegisterPressure.cpp | 102 if (!P.LaneMask.all()) in dump()
103 dbgs() << ':' << PrintLaneMask(P.LaneMask); in dump()
110 if (!P.LaneMask.all()) in dump()
111 dbgs() << ':' << PrintLaneMask(P.LaneMask); in dump()
352 LaneBitmask::getNone(), Pair.LaneMask); in initLiveThru()
363 return I->LaneMask; in getRegLanes()
369 assert(Pair.LaneMask.any()); in addRegLanes()
376 I->LaneMask |= Pair.LaneMask; in addRegLanes()
388 I->LaneMask = LaneBitmask::getNone(); in setRegZero()
395 assert(Pair.LaneMask.any()); in removeRegLanes()
[all …]
|
| D | MachineVerifier.cpp | 247 LaneBitmask LaneMask) const;
252 void report_context_lanemask(LaneBitmask LaneMask) const;
261 LaneBitmask LaneMask = LaneBitmask::getNone());
264 LaneBitmask LaneMask = LaneBitmask::getNone());
280 LaneBitmask LaneMask = LaneBitmask::getNone());
514 LaneBitmask LaneMask) const { in report_context()
517 if (LaneMask.any()) in report_context()
518 report_context_lanemask(LaneMask); in report_context()
545 void MachineVerifier::report_context_lanemask(LaneBitmask LaneMask) const { in report_context_lanemask()
546 errs() << "- lanemask: " << PrintLaneMask(LaneMask) << '\n'; in report_context_lanemask()
[all …]
|
| D | ScheduleDAGInstrs.cpp | 400 LaneBitmask LaneMask = I->LaneMask; in addVRegDefDeps() local
402 if ((LaneMask & KillLaneMask).none()) { in addVRegDefDeps()
407 if ((LaneMask & DefLaneMask).any()) { in addVRegDefDeps()
417 LaneMask &= ~KillLaneMask; in addVRegDefDeps()
419 if (LaneMask.any()) { in addVRegDefDeps()
420 I->LaneMask = LaneMask; in addVRegDefDeps()
438 LaneBitmask LaneMask = DefLaneMask; in addVRegDefDeps() local
442 if ((V2SU.LaneMask & LaneMask).none()) in addVRegDefDeps()
461 LaneBitmask OverlapMask = V2SU.LaneMask & LaneMask; in addVRegDefDeps()
462 LaneBitmask NonOverlapMask = V2SU.LaneMask & ~LaneMask; in addVRegDefDeps()
[all …]
|
| D | LiveIntervals.cpp | 363 unsigned Reg, LaneBitmask LaneMask) { in extendSegmentsToUses() argument
374 if ((SR.LaneMask & M).any()) { in extendSegmentsToUses()
375 assert(SR.LaneMask == M && "Expecting lane masks to match exactly"); in extendSegmentsToUses()
383 const LiveRange &OldRange = getSubRange(LI, LaneMask); in extendSegmentsToUses()
430 assert(LaneMask.any() && in extendSegmentsToUses()
433 LI.computeSubRangeUndefs(Undefs, LaneMask, *MRI, *Indexes); in extendSegmentsToUses()
559 LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg); in shrinkToUses() local
560 if ((LaneMask & SR.LaneMask).none()) in shrinkToUses()
588 extendSegmentsToUses(NewLR, WorkList, Reg, SR.LaneMask); in shrinkToUses()
773 DefinedLanesMask |= SR.LaneMask; in addKillFlags()
[all …]
|
| D | RenameIndependentSubregs.cpp | 183 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in findComponents() local
187 if ((SR.LaneMask & LaneMask).none()) in findComponents()
227 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in rewriteOperands() local
232 if ((SR.LaneMask & LaneMask).none()) in rewriteOperands()
285 SubRanges[ID-1] = Intervals[ID]->createSubRange(Allocator, SR.LaneMask); in distribute()
|
| D | MachineBasicBlock.cpp | 388 if (!LI.LaneMask.all()) in print()
389 OS << ":0x" << PrintLaneMask(LI.LaneMask); in print()
436 void MachineBasicBlock::removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) { in removeLiveIn() argument
442 I->LaneMask &= ~LaneMask; in removeLiveIn()
443 if (I->LaneMask.none()) in removeLiveIn()
454 bool MachineBasicBlock::isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) const { in isLiveIn()
457 return I != livein_end() && (I->LaneMask & LaneMask).any(); in isLiveIn()
471 LaneBitmask LaneMask = I->LaneMask; in sortUniqueLiveIns() local
473 LaneMask |= J->LaneMask; in sortUniqueLiveIns()
475 Out->LaneMask = LaneMask; in sortUniqueLiveIns()
|
| D | RegisterCoalescer.cpp | 184 LaneBitmask LaneMask, CoalescerPair &CP);
189 LaneBitmask LaneMask, const CoalescerPair &CP);
862 IntB.refineSubRanges(Allocator, SA.LaneMask, in removeCopyByCommutingDef()
1248 SR.LaneMask = TRI->composeSubRegIndexLaneMask(DstIdx, SR.LaneMask); in reMaterializeTrivialDef()
1283 MaxMask &= ~SR.LaneMask; in reMaterializeTrivialDef()
1305 if ((SR.LaneMask & DstMask).none()) { in reMaterializeTrivialDef()
1308 << PrintLaneMask(SR.LaneMask) << " : " << SR << "\n"); in reMaterializeTrivialDef()
1410 if ((SR.LaneMask & SrcMask).none()) in eliminateUndefCopy()
1449 if ((SR.LaneMask & DstMask).none()) in eliminateUndefCopy()
1471 if ((SR.LaneMask & UseMask).none()) in eliminateUndefCopy()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIFormMemoryClauses.cpp | 65 void forAllLanes(unsigned Reg, LaneBitmask LaneMask, Callable Func) const;
143 void SIFormMemoryClauses::forAllLanes(unsigned Reg, LaneBitmask LaneMask, in forAllLanes() argument
145 if (LaneMask.all() || TargetRegisterInfo::isPhysicalRegister(Reg) || in forAllLanes()
146 LaneMask == MRI->getMaxLaneMaskForVReg(Reg)) { in forAllLanes()
160 if (SubRegMask == LaneMask) { in forAllLanes()
165 if ((SubRegMask & ~LaneMask).any() || (SubRegMask & LaneMask).none()) in forAllLanes()
184 if ((SubRegMask & ~LaneMask).any() || (SubRegMask & LaneMask).none()) in forAllLanes()
188 LaneMask &= ~SubRegMask; in forAllLanes()
189 if (LaneMask.none()) in forAllLanes()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
| D | LaneBitmask.h | 94 inline Printable PrintLaneMask(LaneBitmask LaneMask) { in PrintLaneMask() argument
95 return Printable([LaneMask](raw_ostream &OS) { in PrintLaneMask()
96 OS << format(LaneBitmask::FormatStr, LaneMask.getAsInteger()); in PrintLaneMask()
|
| /external/llvm/utils/TableGen/ |
| D | CodeGenRegisters.cpp | 34 : TheDef(R), EnumValue(Enum), LaneMask(0), AllSuperRegsCovered(true) { in CodeGenSubRegIndex()
45 EnumValue(Enum), LaneMask(0), AllSuperRegsCovered(true) { in CodeGenSubRegIndex()
87 if (LaneMask) in computeLaneMask()
88 return LaneMask; in computeLaneMask()
91 LaneMask = ~0u; in computeLaneMask()
98 LaneMask = M; in computeLaneMask()
99 return LaneMask; in computeLaneMask()
658 LaneMask(0) { in CodeGenRegisterClass()
1178 Idx.LaneMask = 1u << Bit; in computeSubRegLaneMasks()
1181 Idx.LaneMask = 0; in computeSubRegLaneMasks()
[all …]
|