Home
last modified time | relevance | path

Searched refs:Ld2 (Results 1 – 11 of 11) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopVectorize/AArch64/
Dreduction-small-size.ll129 ; CHECK: [[Ld2:%[a-zA-Z0-9.]+]] = load <8 x i8>
130 ; CHECK: zext <8 x i8> [[Ld2]] to <8 x i16>
/external/llvm/test/Transforms/LoopVectorize/AArch64/
Dreduction-small-size.ll143 ; CHECK: [[Ld2:%[a-zA-Z0-9.]+]] = load <8 x i8>
144 ; CHECK: zext <8 x i8> [[Ld2]] to <8 x i16>
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMParallelDSP.cpp365 auto *Ld2 = dyn_cast<LoadInst>(Mul0_RHS[x]); in CreateParallelMACPairs() local
376 AreSequentialLoads(Ld2, Ld3, PMul1->VecLd)) { in CreateParallelMACPairs()
/external/vixl/test/aarch64/
Dtest-disasm-aarch64.cc3512 COMPARE_MACRO(Ld2(v1.M, v2.M, MemOperand(x16)), \ in TEST()
3534 COMPARE_MACRO(Ld2(v1.M, v2.M, MemOperand(x16, x21, PostIndex)), \ in TEST()
3576 COMPARE_MACRO(Ld2(v2.V4H(), v3.V4H(), MemOperand(x17, 16, PostIndex)), in TEST()
3578 COMPARE_MACRO(Ld2(v4.V8H(), v5.V8H(), MemOperand(x18, 32, PostIndex)), in TEST()
3857 COMPARE_MACRO(Ld2(v0.V8B(), v1.V8B(), 0, MemOperand(x15)), in TEST()
3859 COMPARE_MACRO(Ld2(v1.V16B(), v2.V16B(), 1, MemOperand(x16)), in TEST()
3861 COMPARE_MACRO(Ld2(v2.V4H(), v3.V4H(), 2, MemOperand(x17)), in TEST()
3863 COMPARE_MACRO(Ld2(v3.V8H(), v4.V8H(), 3, MemOperand(x18)), in TEST()
3865 COMPARE_MACRO(Ld2(v4.V2S(), v5.V2S(), 0, MemOperand(x19)), in TEST()
3867 COMPARE_MACRO(Ld2(v5.V4S(), v6.V4S(), 1, MemOperand(x20)), in TEST()
[all …]
Dtest-assembler-aarch64.cc4030 __ Ld2(v2.V8B(), v3.V8B(), MemOperand(x17)); in TEST() local
4032 __ Ld2(v4.V8B(), v5.V8B(), MemOperand(x17)); in TEST() local
4034 __ Ld2(v6.V4H(), v7.V4H(), MemOperand(x17)); in TEST() local
4036 __ Ld2(v31.V2S(), v0.V2S(), MemOperand(x17)); in TEST() local
4069 __ Ld2(v2.V8B(), v3.V8B(), MemOperand(x17, x22, PostIndex)); in TEST() local
4070 __ Ld2(v4.V8B(), v5.V8B(), MemOperand(x18, 16, PostIndex)); in TEST() local
4071 __ Ld2(v5.V4H(), v6.V4H(), MemOperand(x19, 16, PostIndex)); in TEST() local
4072 __ Ld2(v16.V2S(), v17.V2S(), MemOperand(x20, 16, PostIndex)); in TEST() local
4073 __ Ld2(v31.V2S(), v0.V2S(), MemOperand(x21, 16, PostIndex)); in TEST() local
4109 __ Ld2(v2.V16B(), v3.V16B(), MemOperand(x17)); in TEST() local
[all …]
/external/honggfuzz/examples/apache-httpd/corpus_http2/
D0958a70eab5ff91d3634c709c72bc1f2.000022c5.honggfuzz.cov72 Z,�JPV|x�*��j��Pr�N��#eN�f�=���N�v9~�7%�wN�Su�S�5+�c�4\ o��&|Gd���Ld2�6�V�L�jI�Y�y�2��û…
Dc85cfcb3c3ac522e98cce4a3d526b73c.000022c5.honggfuzz.cov73 Z,�JPV|x�*��j��Pr�N��#eN�f�=���N�v9~�7%�wN�Su�S�5+�c�4\ o��&|Gd���Ld2�6�V�L�jI�Y�y�2��û…
D0d518787101e60875c5e338eb9d594c3.000022c5.honggfuzz.cov72 Z,�JPV|x�*��j��Pr�N��#eN�f�=���N�v9~�7%�wN�Su�S�5+�c�4\ o��&|Gd���Ld2�6�V�L�jI�Y�y�2��û…
/external/v8/src/arm64/
Dmacro-assembler-arm64.h1410 void Ld2(const VRegister& vt, const VRegister& vt2, const MemOperand& src) { in Ld2() function
1414 void Ld2(const VRegister& vt, const VRegister& vt2, int lane, in Ld2() function
/external/vixl/src/aarch64/
Dmacro-assembler-aarch64.h2990 void Ld2(const VRegister& vt, const VRegister& vt2, const MemOperand& src) { in Ld2() function
2995 void Ld2(const VRegister& vt, in Ld2() function
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/autohvx/
Dshuff-combos-128b.ll202 ; CHECK: v[[Hd2:[0-9]+]]:[[Ld2:[0-9]+]] = vdeal(v[[Hd1]],v[[Ld1]],[[Rd2]])