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Searched refs:Legal (Results 1 – 25 of 430) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86LegalizerInfo.cpp99 setAction({G_IMPLICIT_DEF, Ty}, Legal); in setLegalizerInfo32bit()
102 setAction({G_PHI, Ty}, Legal); in setLegalizerInfo32bit()
106 setAction({BinOp, Ty}, Legal); in setLegalizerInfo32bit()
109 setAction({Op, s32}, Legal); in setLegalizerInfo32bit()
110 setAction({Op, 1, s1}, Legal); in setLegalizerInfo32bit()
115 setAction({MemOp, Ty}, Legal); in setLegalizerInfo32bit()
118 setAction({MemOp, 1, p0}, Legal); in setLegalizerInfo32bit()
122 setAction({G_FRAME_INDEX, p0}, Legal); in setLegalizerInfo32bit()
123 setAction({G_GLOBAL_VALUE, p0}, Legal); in setLegalizerInfo32bit()
125 setAction({G_GEP, p0}, Legal); in setLegalizerInfo32bit()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPULegalizerInfo.cpp58 setAction({G_ADD, S32}, Legal); in AMDGPULegalizerInfo()
59 setAction({G_ASHR, S32}, Legal); in AMDGPULegalizerInfo()
60 setAction({G_SUB, S32}, Legal); in AMDGPULegalizerInfo()
61 setAction({G_MUL, S32}, Legal); in AMDGPULegalizerInfo()
62 setAction({G_AND, S32}, Legal); in AMDGPULegalizerInfo()
63 setAction({G_OR, S32}, Legal); in AMDGPULegalizerInfo()
64 setAction({G_XOR, S32}, Legal); in AMDGPULegalizerInfo()
66 setAction({G_BITCAST, V2S16}, Legal); in AMDGPULegalizerInfo()
67 setAction({G_BITCAST, 1, S32}, Legal); in AMDGPULegalizerInfo()
69 setAction({G_BITCAST, S32}, Legal); in AMDGPULegalizerInfo()
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/external/swiftshader/third_party/llvm-7.0/llvm/unittests/CodeGen/GlobalISel/
DLegalizerInfoTest.cpp23 case Legal: OS << "Legal"; break; in operator <<()
56 L.setAction({Op, 0, LLT::scalar(Size)}, Legal); in TEST()
70 LegalizeActionStep(Legal, 0, LLT{})); in TEST()
72 LegalizeActionStep(Legal, 0, LLT{})); in TEST()
95 L.setAction({G_ADD, LLT::vector(8, 8)}, Legal); in TEST()
96 L.setAction({G_ADD, LLT::vector(16, 8)}, Legal); in TEST()
97 L.setAction({G_ADD, LLT::vector(4, 16)}, Legal); in TEST()
98 L.setAction({G_ADD, LLT::vector(8, 16)}, Legal); in TEST()
99 L.setAction({G_ADD, LLT::vector(2, 32)}, Legal); in TEST()
100 L.setAction({G_ADD, LLT::vector(4, 32)}, Legal); in TEST()
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/external/icu/icu4c/source/test/intltest/
Dtransrt.cpp116 class Legal { class
118 Legal() {} in Legal() function in Legal
119 virtual ~Legal() {} in ~Legal()
123 class LegalJamo : public Legal {
168 class LegalGreek : public Legal {
344 Legal* legalSource; // NOT owned
365 Legal* adoptedLegal,
468 Legal* adoptedLegal, in test()
979 Legal *legal = new Legal(); in TestKana()
993 Legal *legal = new Legal(); in TestHiragana()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/
DLegalizerInfo.cpp113 setScalarAction(TargetOpcode::G_ANYEXT, 1, {{1, Legal}}); in LegalizerInfo()
114 setScalarAction(TargetOpcode::G_ZEXT, 1, {{1, Legal}}); in LegalizerInfo()
115 setScalarAction(TargetOpcode::G_SEXT, 1, {{1, Legal}}); in LegalizerInfo()
116 setScalarAction(TargetOpcode::G_TRUNC, 0, {{1, Legal}}); in LegalizerInfo()
117 setScalarAction(TargetOpcode::G_TRUNC, 1, {{1, Legal}}); in LegalizerInfo()
119 setScalarAction(TargetOpcode::G_INTRINSIC, 0, {{1, Legal}}); in LegalizerInfo()
120 setScalarAction(TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS, 0, {{1, Legal}}); in LegalizerInfo()
206 ElementSizesSeen.push_back({ElementSize, Legal}); in computeTables()
330 if (Action.first != Legal) { in getAction()
339 return {Legal, 0, LLT{}}; in getAction()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Vectorize/
DVPRecipeBuilder.h37 LoopVectorizationLegality *Legal; variable
108 LoopVectorizationLegality *Legal, in VPRecipeBuilder() argument
110 : OrigLoop(OrigLoop), TLI(TLI), TTI(TTI), Legal(Legal), CM(CM), in VPRecipeBuilder()
DLoopVectorizationPlanner.h193 LoopVectorizationLegality *Legal; variable
221 LoopVectorizationLegality *Legal, in LoopVectorizationPlanner() argument
223 : OrigLoop(L), LI(LI), TLI(TLI), TTI(TTI), Legal(Legal), CM(CM) {} in LoopVectorizationPlanner()
DLoopVectorize.cpp369 VectorLoopValueMap(UnrollFactor, VecWidth), Legal(LVL), Cost(CM) {} in InnerLoopVectorizer()
697 LoopVectorizationLegality *Legal; member in llvm::InnerLoopVectorizer
1175 LoopInfo *LI, LoopVectorizationLegality *Legal, in LoopVectorizationCostModel() argument
1182 : TheLoop(L), PSE(PSE), LI(LI), Legal(Legal), TTI(TTI), TLI(TLI), DB(DB), in LoopVectorizationCostModel()
1356 if (Op != Legal->getPrimaryInduction() && TTI.isTruncateFree(SrcTy, DestTy)) in isOptimizableIVTruncate()
1360 return Legal->isInductionPhi(Op); in isOptimizableIVTruncate()
1382 return Legal->isConsecutivePtr(Ptr) && TTI.isLegalMaskedStore(DataType); in isLegalMaskedStore()
1388 return Legal->isConsecutivePtr(Ptr) && TTI.isLegalMaskedLoad(DataType); in isLegalMaskedLoad()
1582 LoopVectorizationLegality *Legal; member in llvm::LoopVectorizationCostModel
1897 auto II = Legal->getInductionVars()->find(IV); in widenIntOrFpInduction()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp95 setOperationAction(ISD::ADD, VecTys[i], Legal); in MipsSETargetLowering()
96 setOperationAction(ISD::SUB, VecTys[i], Legal); in MipsSETargetLowering()
97 setOperationAction(ISD::LOAD, VecTys[i], Legal); in MipsSETargetLowering()
98 setOperationAction(ISD::STORE, VecTys[i], Legal); in MipsSETargetLowering()
99 setOperationAction(ISD::BITCAST, VecTys[i], Legal); in MipsSETargetLowering()
109 setOperationAction(ISD::ADDC, MVT::i32, Legal); in MipsSETargetLowering()
110 setOperationAction(ISD::ADDE, MVT::i32, Legal); in MipsSETargetLowering()
115 setOperationAction(ISD::MUL, MVT::v2i16, Legal); in MipsSETargetLowering()
189 setOperationAction(ISD::MUL, MVT::i64, Legal); in MipsSETargetLowering()
227 setOperationAction(ISD::MUL, MVT::i32, Legal); in MipsSETargetLowering()
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/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp69 setOperationAction(ISD::ADD, VecTys[i], Legal); in MipsSETargetLowering()
70 setOperationAction(ISD::SUB, VecTys[i], Legal); in MipsSETargetLowering()
71 setOperationAction(ISD::LOAD, VecTys[i], Legal); in MipsSETargetLowering()
72 setOperationAction(ISD::STORE, VecTys[i], Legal); in MipsSETargetLowering()
73 setOperationAction(ISD::BITCAST, VecTys[i], Legal); in MipsSETargetLowering()
84 setOperationAction(ISD::MUL, MVT::v2i16, Legal); in MipsSETargetLowering()
120 setOperationAction(ISD::MUL, MVT::i64, Legal); in MipsSETargetLowering()
160 setOperationAction(ISD::MUL, MVT::i32, Legal); in MipsSETargetLowering()
161 setOperationAction(ISD::MULHS, MVT::i32, Legal); in MipsSETargetLowering()
162 setOperationAction(ISD::MULHU, MVT::i32, Legal); in MipsSETargetLowering()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/
DARCISelLowering.cpp95 setOperationAction(ISD::ADD, MVT::i32, Legal); in ARCTargetLowering()
96 setOperationAction(ISD::SUB, MVT::i32, Legal); in ARCTargetLowering()
97 setOperationAction(ISD::AND, MVT::i32, Legal); in ARCTargetLowering()
98 setOperationAction(ISD::SMAX, MVT::i32, Legal); in ARCTargetLowering()
99 setOperationAction(ISD::SMIN, MVT::i32, Legal); in ARCTargetLowering()
102 setOperationAction(ISD::SHL, MVT::i32, Legal); in ARCTargetLowering()
103 setOperationAction(ISD::SRA, MVT::i32, Legal); in ARCTargetLowering()
104 setOperationAction(ISD::SRL, MVT::i32, Legal); in ARCTargetLowering()
105 setOperationAction(ISD::ROTR, MVT::i32, Legal); in ARCTargetLowering()
107 setOperationAction(ISD::Constant, MVT::i32, Legal); in ARCTargetLowering()
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/external/llvm/lib/Transforms/Vectorize/
DLoopVectorize.cpp298 VectorTripCount(nullptr), Legal(nullptr), AddedSafetyChecks(false) {} in InnerLoopVectorizer()
311 Legal = L; in vectorize()
604 LoopVectorizationLegality *Legal; member in __anon0b4224d80111::InnerLoopVectorizer
1603 LoopInfo *LI, LoopVectorizationLegality *Legal, in LoopVectorizationCostModel() argument
1608 : TheLoop(L), PSE(PSE), LI(LI), Legal(Legal), TTI(TTI), TLI(TLI), DB(DB), in LoopVectorizationCostModel()
1708 LoopVectorizationLegality *Legal; member in __anon0b4224d80111::LoopVectorizationCostModel
1910 auto II = Legal->getInductionVars()->find(IV); in widenIntInduction()
1911 assert(II != Legal->getInductionVars()->end() && "IV is not an induction"); in widenIntInduction()
2122 if (Legal->hasStride(V)) in getVectorValue()
2271 const InterleaveGroup *Group = Legal->getInterleavedAccessGroup(Instr); in vectorizeInterleaveGroup()
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/external/icu/android_icu4j/src/main/tests/android/icu/dev/test/translit/
DRoundTripTest.java135 …TAKANA, "[" + HIRAGANA + LENGTH + "]", "[" + HALFWIDTH_KATAKANA + LENGTH + "]", this, new Legal()); in TestKana()
143 .test("[a-zA-Z]", HIRAGANA, HIRAGANA_ITERATION, this, new Legal()); in TestHiragana()
151 …test("[a-zA-Z]", KATAKANA, "[" + KATAKANA_ITERATION + HALFWIDTH_KATAKANA + "]", this, new Legal()); in TestKatakana()
182 t.test("[a-zA-Z]", "[\uAC00-\uD7A4]", "", this, new Legal()); in TestHangul()
398 .test("[a-zA-Z\u0110\u0111\u02BA\u02B9]", "[\u0400-\u045F]", null, this, new Legal()); in TestCyrillic()
408 … .test("[a-zA-Z\u02BE\u02BF]", ARABIC, "[a-zA-Z\u02BE\u02BF\u207F]", null, this, new Legal()); // in TestArabic()
450 public static class LegalIndic extends Legal{
925 public static class Legal { class in RoundTripTest
929 public static class LegalJamo extends Legal {
971 public static class LegalThai extends Legal {
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/external/autotest/client/site_tests/platform_DebugDaemonCupsAddPrinters/src/
DGenericPostScript.ppd.gz
/external/icu/icu4j/main/tests/translit/src/com/ibm/icu/dev/test/translit/
DRoundTripTest.java132 …TAKANA, "[" + HIRAGANA + LENGTH + "]", "[" + HALFWIDTH_KATAKANA + LENGTH + "]", this, new Legal()); in TestKana()
140 .test("[a-zA-Z]", HIRAGANA, HIRAGANA_ITERATION, this, new Legal()); in TestHiragana()
148 …test("[a-zA-Z]", KATAKANA, "[" + KATAKANA_ITERATION + HALFWIDTH_KATAKANA + "]", this, new Legal()); in TestKatakana()
179 t.test("[a-zA-Z]", "[\uAC00-\uD7A4]", "", this, new Legal()); in TestHangul()
395 .test("[a-zA-Z\u0110\u0111\u02BA\u02B9]", "[\u0400-\u045F]", null, this, new Legal()); in TestCyrillic()
405 … .test("[a-zA-Z\u02BE\u02BF]", ARABIC, "[a-zA-Z\u02BE\u02BF\u207F]", null, this, new Legal()); // in TestArabic()
447 public static class LegalIndic extends Legal{
922 public static class Legal { class in RoundTripTest
926 public static class LegalJamo extends Legal {
968 public static class LegalThai extends Legal {
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp150 setOperationAction(ISD::BITREVERSE, MVT::i32, Legal); in PPCTargetLowering()
151 setOperationAction(ISD::BITREVERSE, MVT::i64, Legal); in PPCTargetLowering()
165 setIndexedLoadAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering()
166 setIndexedLoadAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering()
167 setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering()
168 setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering()
169 setIndexedLoadAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering()
170 setIndexedStoreAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering()
171 setIndexedStoreAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering()
172 setIndexedStoreAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering()
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/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp97 setIndexedLoadAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering()
98 setIndexedLoadAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering()
99 setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering()
100 setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering()
101 setIndexedLoadAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering()
102 setIndexedLoadAction(ISD::PRE_INC, MVT::f32, Legal); in PPCTargetLowering()
103 setIndexedLoadAction(ISD::PRE_INC, MVT::f64, Legal); in PPCTargetLowering()
104 setIndexedStoreAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering()
105 setIndexedStoreAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering()
106 setIndexedStoreAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp242 setOperationAction(ISD::TRAP, MVT::Other, Legal); in SystemZTargetLowering()
253 setOperationAction(ISD::CTLZ, MVT::i64, Legal); in SystemZTargetLowering()
294 if (getOperationAction(Opcode, VT) == Legal) in SystemZTargetLowering()
310 setOperationAction(ISD::LOAD, VT, Legal); in SystemZTargetLowering()
311 setOperationAction(ISD::STORE, VT, Legal); in SystemZTargetLowering()
312 setOperationAction(ISD::VSELECT, VT, Legal); in SystemZTargetLowering()
313 setOperationAction(ISD::BITCAST, VT, Legal); in SystemZTargetLowering()
314 setOperationAction(ISD::UNDEF, VT, Legal); in SystemZTargetLowering()
327 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Legal); in SystemZTargetLowering()
328 setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Legal); in SystemZTargetLowering()
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/external/skqp/tools/
Drandom_parse_path.cpp11 const struct Legal { struct
71 const Legal& legal = gLegal[index]; in MakeRandomParsePathPiece()
/external/skia/tools/
Drandom_parse_path.cpp11 const struct Legal { struct
71 const Legal& legal = gLegal[index]; in MakeRandomParsePathPiece()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonISelLoweringHVX.cpp70 setOperationAction(ISD::VECTOR_SHUFFLE, ByteV, Legal); in initializeHVXLowering()
71 setOperationAction(ISD::VECTOR_SHUFFLE, ByteW, Legal); in initializeHVXLowering()
74 setIndexedLoadAction(ISD::POST_INC, T, Legal); in initializeHVXLowering()
75 setIndexedStoreAction(ISD::POST_INC, T, Legal); in initializeHVXLowering()
77 setOperationAction(ISD::AND, T, Legal); in initializeHVXLowering()
78 setOperationAction(ISD::OR, T, Legal); in initializeHVXLowering()
79 setOperationAction(ISD::XOR, T, Legal); in initializeHVXLowering()
80 setOperationAction(ISD::ADD, T, Legal); in initializeHVXLowering()
81 setOperationAction(ISD::SUB, T, Legal); in initializeHVXLowering()
82 setOperationAction(ISD::CTPOP, T, Legal); in initializeHVXLowering()
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/external/skia/fuzz/
DFuzzParsePath.cpp17 static const struct Legal { struct
80 const Legal& legal = gLegal[index]; in MakeRandomParsePathPiece()
/external/skqp/fuzz/
DFuzzParsePath.cpp17 static const struct Legal { struct
80 const Legal& legal = gLegal[index]; in MakeRandomParsePathPiece()
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUISelLowering.cpp131 setOperationAction(ISD::ConstantFP, MVT::f32, Legal); in SPUTargetLowering()
239 setOperationAction(ISD::ROTL, MVT::i32, Legal); in SPUTargetLowering()
240 setOperationAction(ISD::ROTL, MVT::i16, Legal); in SPUTargetLowering()
249 setOperationAction(ISD::SHL, MVT::i64, Legal); in SPUTargetLowering()
250 setOperationAction(ISD::SRL, MVT::i64, Legal); in SPUTargetLowering()
251 setOperationAction(ISD::SRA, MVT::i64, Legal); in SPUTargetLowering()
255 setOperationAction(ISD::MUL, MVT::i32, Legal); in SPUTargetLowering()
256 setOperationAction(ISD::MUL, MVT::i64, Legal); in SPUTargetLowering()
279 setOperationAction(ISD::ADD, MVT::i64, Legal); in SPUTargetLowering()
281 setOperationAction(ISD::SUB, MVT::i64, Legal); in SPUTargetLowering()
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/external/llvm/include/llvm/Target/
DTargetLowering.h90 Legal, // The target natively supports this operation. enumerator
611 (getOperationAction(Op, VT) == Legal || in isOperationLegalOrCustom()
620 (getOperationAction(Op, VT) == Legal || in isOperationLegalOrPromote()
629 (getOperationAction(Op, VT) == Legal || in isOperationLegalOrCustomOrPromote()
651 getOperationAction(Op, VT) == Legal; in isOperationLegal()
670 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal; in isLoadExtLegal()
676 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal || in isLoadExtLegalOrCustom()
695 return isTypeLegal(ValVT) && getTruncStoreAction(ValVT, MemVT) == Legal; in isTruncStoreLegal()
702 (getTruncStoreAction(ValVT, MemVT) == Legal || in isTruncStoreLegalOrCustom()
720 (getIndexedLoadAction(IdxMode, VT.getSimpleVT()) == Legal || in isIndexedLoadLegal()
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