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Searched refs:LiveReg (Results 1 – 11 of 11) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/CodeGen/
DRegAllocFast.cpp72 struct LiveReg { struct in __anonafd75e820111::RAFast
78 LiveReg(unsigned p=0) : LastUse(0), PhysReg(p), LastOpNum(0), in LiveReg() function
82 typedef DenseMap<unsigned, LiveReg> LiveRegMap;
153 void addKillFlag(const LiveReg&);
212 void RAFast::addKillFlag(const LiveReg &LR) { in addKillFlag()
226 const LiveReg &LR = LRI->second; in killVirtReg()
256 LiveReg &LR = LRI->second; in spillVirtReg()
547 tie(LRI, New) = LiveVirtRegs.insert(std::make_pair(VirtReg, LiveReg())); in defineVirtReg()
548 LiveReg &LR = LRI->second; in defineVirtReg()
581 tie(LRI, New) = LiveVirtRegs.insert(std::make_pair(VirtReg, LiveReg())); in reloadVirtReg()
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DTargetInstrInfoImpl.cpp242 unsigned LiveReg = LiveOp.getReg(); in canFoldCopy() local
253 if (RC->hasSubClassEq(MRI.getRegClass(LiveReg))) in canFoldCopy()
DLiveIntervalAnalysis.cpp2138 bool LiveReg = false; in spillPhysRegAroundRegDefsUses() local
2144 LiveReg = true; in spillPhysRegAroundRegDefsUses()
2159 LiveReg = true; in spillPhysRegAroundRegDefsUses()
2161 if (!LiveReg) in spillPhysRegAroundRegDefsUses()
/external/llvm/lib/CodeGen/
DExecutionDepsFix.cpp117 struct LiveReg { struct
142 LiveReg *LiveRegs;
143 typedef DenseMap<MachineBasicBlock*, LiveReg*> LiveOutMap;
373 LiveRegs = new LiveReg[NumRegs]; in enterBasicBlock()
655 SmallVector<LiveReg, 4> Regs; in visitSoftInstr()
659 const LiveReg &LR = LiveRegs[rx]; in visitSoftInstr()
667 for (SmallVectorImpl<LiveReg>::iterator i = Regs.begin(), e = Regs.end(); in visitSoftInstr()
DRegAllocFast.cpp69 struct LiveReg { struct in __anon2ce442560111::RAFast
76 explicit LiveReg(unsigned v) in LiveReg() argument
84 typedef SparseSet<LiveReg> LiveRegMap;
174 void addKillFlag(const LiveReg&);
183 void assignVirtToPhysReg(LiveReg&, unsigned PhysReg);
237 void RAFast::addKillFlag(const LiveReg &LR) { in addKillFlag()
281 LiveReg &LR = *LRI; in spillVirtReg()
507 void RAFast::assignVirtToPhysReg(LiveReg &LR, unsigned PhysReg) { in assignVirtToPhysReg()
606 std::tie(LRI, New) = LiveVirtRegs.insert(LiveReg(VirtReg)); in defineVirtReg()
640 std::tie(LRI, New) = LiveVirtRegs.insert(LiveReg(VirtReg)); in reloadVirtReg()
DInlineSpiller.cpp90 unsigned &LiveReg);
1081 MachineBasicBlock &BB, unsigned &LiveReg) { in isSpillCandBB() argument
1097 LiveReg = SibReg; in isSpillCandBB()
1303 unsigned LiveReg = 0; in runHoistSpills() local
1304 if (!isSpillCandBB(OrigReg, OrigVNI, *Block, LiveReg)) in runHoistSpills()
1327 SpillsToKeep[*RIt] = LiveReg; in runHoistSpills()
1425 unsigned LiveReg = Insert.second; in hoistAllSpills() local
1427 TII.storeRegToStackSlot(*BB, MI, LiveReg, false, Slot, in hoistAllSpills()
1428 MRI.getRegClass(LiveReg), &TRI); in hoistAllSpills()
DTargetInstrInfo.cpp413 unsigned LiveReg = LiveOp.getReg(); in canFoldCopy() local
424 if (RC->hasSubClassEq(MRI.getRegClass(LiveReg))) in canFoldCopy()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DRegAllocFast.cpp84 struct LiveReg { struct in __anonc24399ae0111::RegAllocFast
91 explicit LiveReg(unsigned v) : VirtReg(v) {} in LiveReg() function
98 using LiveRegMap = SparseSet<LiveReg>;
189 void addKillFlag(const LiveReg &LRI);
199 void assignVirtToPhysReg(LiveReg &, MCPhysReg PhysReg);
265 void RegAllocFast::addKillFlag(const LiveReg &LR) { in addKillFlag()
317 LiveReg &LR = *LRI; in spillVirtReg()
528 void RegAllocFast::assignVirtToPhysReg(LiveReg &LR, MCPhysReg PhysReg) { in assignVirtToPhysReg()
620 std::tie(LRI, New) = LiveVirtRegs.insert(LiveReg(VirtReg)); in defineVirtReg()
654 std::tie(LRI, New) = LiveVirtRegs.insert(LiveReg(VirtReg)); in reloadVirtReg()
DInlineSpiller.cpp116 MachineBasicBlock &BB, unsigned &LiveReg);
1140 MachineBasicBlock &BB, unsigned &LiveReg) { in isSpillCandBB() argument
1155 LiveReg = SibReg; in isSpillCandBB()
1360 unsigned LiveReg = 0; in runHoistSpills() local
1361 if (!isSpillCandBB(OrigLI, OrigVNI, *Block, LiveReg)) in runHoistSpills()
1384 SpillsToKeep[*RIt] = LiveReg; in runHoistSpills()
1475 unsigned LiveReg = Insert.second; in hoistAllSpills() local
1477 TII.storeRegToStackSlot(*BB, MI, LiveReg, false, Slot, in hoistAllSpills()
1478 MRI.getRegClass(LiveReg), &TRI); in hoistAllSpills()
DTargetInstrInfo.cpp450 unsigned LiveReg = LiveOp.getReg(); in canFoldCopy() local
461 if (RC->hasSubClassEq(MRI.getRegClass(LiveReg))) in canFoldCopy()
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
DMBlazeISelLowering.cpp975 unsigned LiveReg = MF.addLiveIn(Reg, RC); in LowerFormalArguments() local
976 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, LiveReg, MVT::i32); in LowerFormalArguments()