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Searched refs:LiveRegs (Results 1 – 25 of 48) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/CodeGen/
DExecutionDepsFix.cpp117 DomainValue **LiveRegs; member in __anon1b4d15520211::ExeDepsFix
187 if (!LiveRegs) { in SetLiveReg()
188 LiveRegs = new DomainValue*[NumRegs]; in SetLiveReg()
189 std::fill(LiveRegs, LiveRegs+NumRegs, (DomainValue*)0); in SetLiveReg()
192 if (LiveRegs[rx] == dv) in SetLiveReg()
194 if (LiveRegs[rx]) { in SetLiveReg()
195 assert(LiveRegs[rx]->Refs && "Bad refcount"); in SetLiveReg()
196 if (--LiveRegs[rx]->Refs == 0) Recycle(LiveRegs[rx]); in SetLiveReg()
198 LiveRegs[rx] = dv; in SetLiveReg()
205 if (!LiveRegs || !LiveRegs[rx]) return; in Kill()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DExecutionDomainFix.cpp72 assert(!LiveRegs.empty() && "Must enter basic block first."); in setLiveReg()
74 if (LiveRegs[rx] == dv) in setLiveReg()
76 if (LiveRegs[rx]) in setLiveReg()
77 release(LiveRegs[rx]); in setLiveReg()
78 LiveRegs[rx] = retain(dv); in setLiveReg()
83 assert(!LiveRegs.empty() && "Must enter basic block first."); in kill()
84 if (!LiveRegs[rx]) in kill()
87 release(LiveRegs[rx]); in kill()
88 LiveRegs[rx] = nullptr; in kill()
93 assert(!LiveRegs.empty() && "Must enter basic block first."); in force()
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DLivePhysRegs.cpp33 SparseSet<unsigned>::iterator LRI = LiveRegs.begin(); in removeRegsInMask()
34 while (LRI != LiveRegs.end()) { in removeRegsInMask()
38 LRI = LiveRegs.erase(LRI); in removeRegsInMask()
146 if (LiveRegs.count(Reg)) in available()
151 if (LiveRegs.count(*R)) in available()
177 static void addCalleeSavedRegs(LivePhysRegs &LiveRegs, in addCalleeSavedRegs() argument
181 LiveRegs.addReg(*CSR); in addCalleeSavedRegs()
247 void llvm::computeLiveIns(LivePhysRegs &LiveRegs, in computeLiveIns() argument
252 LiveRegs.init(TRI); in computeLiveIns()
253 LiveRegs.addLiveOutsNoPristines(MBB); in computeLiveIns()
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DReachingDefAnalysis.cpp36 if (LiveRegs.empty()) in enterBasicBlock()
37 LiveRegs.assign(NumRegUnits, ReachingDefDefaultVal); in enterBasicBlock()
46 LiveRegs[*Unit] = -1; in enterBasicBlock()
47 MBBReachingDefs[MBBNumber][*Unit].push_back(LiveRegs[*Unit]); in enterBasicBlock()
66 LiveRegs[Unit] = std::max(LiveRegs[Unit], Incoming[Unit]); in enterBasicBlock()
67 if ((LiveRegs[Unit] != ReachingDefDefaultVal)) in enterBasicBlock()
68 MBBReachingDefs[MBBNumber][Unit].push_back(LiveRegs[Unit]); in enterBasicBlock()
79 assert(!LiveRegs.empty() && "Must enter basic block first."); in leaveBasicBlock()
84 MBBOutRegsInfos[MBBNumber] = LiveRegs; in leaveBasicBlock()
92 LiveRegs.clear(); in leaveBasicBlock()
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DStackMapLivenessAnalysis.cpp52 LivePhysRegs LiveRegs; member in __anon47c203780111::StackMapLiveness
128 LiveRegs.init(*TRI); in calculateLiveness()
130 LiveRegs.addLiveOutsNoPristines(MBB); in calculateLiveness()
141 LLVM_DEBUG(dbgs() << " " << LiveRegs << " " << *I); in calculateLiveness()
142 LiveRegs.stepBackward(*I); in calculateLiveness()
164 for (auto Reg : LiveRegs) in createRegisterMask()
DRegisterPressure.cpp241 LiveRegs.clear(); in reset()
274 LiveRegs.init(*MRI); in init()
311 P.LiveInRegs.reserve(LiveRegs.size()); in closeTop()
312 LiveRegs.appendTo(P.LiveInRegs); in closeTop()
323 P.LiveOutRegs.reserve(LiveRegs.size()); in closeBottom()
324 LiveRegs.appendTo(P.LiveOutRegs); in closeBottom()
330 assert(LiveRegs.size() == 0 && "no region boundary"); in closeRegion()
693 LaneBitmask PrevMask = LiveRegs.insert(P); in addLiveRegs()
732 LaneBitmask LiveMask = LiveRegs.contains(Reg); in bumpDeadDefs()
738 LaneBitmask LiveMask = LiveRegs.contains(Reg); in bumpDeadDefs()
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DScheduleDAGInstrs.cpp1031 static void toggleKills(const MachineRegisterInfo &MRI, LivePhysRegs &LiveRegs, in toggleKills() argument
1041 bool IsKill = LiveRegs.available(MRI, Reg); in toggleKills()
1044 LiveRegs.addReg(Reg); in toggleKills()
1051 LiveRegs.init(*TRI); in fixupKills()
1052 LiveRegs.addLiveOuts(MBB); in fixupKills()
1070 LiveRegs.removeReg(Reg); in fixupKills()
1072 LiveRegs.removeRegsInMask(MO); in fixupKills()
1078 toggleKills(MRI, LiveRegs, MI, true); in fixupKills()
1082 toggleKills(MRI, LiveRegs, MI, false); in fixupKills()
1093 toggleKills(MRI, LiveRegs, *I, true); in fixupKills()
/external/llvm/lib/CodeGen/
DExecutionDepsFix.cpp142 LiveReg *LiveRegs; member in __anon590fc3260311::ExeDepsFix
274 assert(LiveRegs && "Must enter basic block first."); in setLiveReg()
276 if (LiveRegs[rx].Value == dv) in setLiveReg()
278 if (LiveRegs[rx].Value) in setLiveReg()
279 release(LiveRegs[rx].Value); in setLiveReg()
280 LiveRegs[rx].Value = retain(dv); in setLiveReg()
286 assert(LiveRegs && "Must enter basic block first."); in kill()
287 if (!LiveRegs[rx].Value) in kill()
290 release(LiveRegs[rx].Value); in kill()
291 LiveRegs[rx].Value = nullptr; in kill()
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DLivePhysRegs.cpp32 SparseSet<unsigned>::iterator LRI = LiveRegs.begin(); in removeRegsInMask()
33 while (LRI != LiveRegs.end()) { in removeRegsInMask()
37 LRI = LiveRegs.erase(LRI); in removeRegsInMask()
132 if (LiveRegs.count(Reg)) in available()
137 if (LiveRegs.count(*R)) in available()
144 static void addLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB) { in addLiveIns() argument
146 LiveRegs.addReg(LI.PhysReg); in addLiveIns()
151 static void addPristines(LivePhysRegs &LiveRegs, const MachineFunction &MF, in addPristines() argument
155 LiveRegs.addReg(*CSR); in addPristines()
157 LiveRegs.removeReg(Info.getReg()); in addPristines()
DStackMapLivenessAnalysis.cpp53 LivePhysRegs LiveRegs; member in __anon16fce8200111::StackMapLiveness
129 LiveRegs.init(TRI); in calculateLiveness()
131 LiveRegs.addLiveOutsNoPristines(MBB); in calculateLiveness()
142 DEBUG(dbgs() << " " << LiveRegs << " " << *I); in calculateLiveness()
143 LiveRegs.stepBackward(*I); in calculateLiveness()
165 for (auto Reg : LiveRegs) in createRegisterMask()
DRegisterPressure.cpp213 LiveRegs.clear(); in reset()
246 LiveRegs.init(*MRI); in init()
285 P.LiveInRegs.reserve(LiveRegs.size()); in closeTop()
286 LiveRegs.appendTo(P.LiveInRegs); in closeTop()
297 P.LiveOutRegs.reserve(LiveRegs.size()); in closeBottom()
298 LiveRegs.appendTo(P.LiveOutRegs); in closeBottom()
304 assert(LiveRegs.size() == 0 && "no region boundary"); in closeRegion()
668 LaneBitmask PrevMask = LiveRegs.insert(P); in addLiveRegs()
708 LaneBitmask LiveMask = LiveRegs.contains(Reg); in bumpDeadDefs()
714 LaneBitmask LiveMask = LiveRegs.contains(Reg); in bumpDeadDefs()
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DScheduleDAGInstrs.cpp1200 LiveRegs.reset(); in startBlockForKills()
1209 LiveRegs.set(*SubRegs); in startBlockForKills()
1247 if (LiveRegs.test(MO.getReg())) { in toggleKillFlag()
1261 if (LiveRegs.test(*SubRegs)) { in toggleKillFlag()
1278 LiveRegs.resize(TRI->getNumRegs()); in fixupKills()
1297 LiveRegs.clearBitsNotInMask(MO.getRegMask()); in fixupKills()
1308 LiveRegs.reset(*SubRegs); in fixupKills()
1326 if (LiveRegs.test(*SubRegs)) { in fixupKills()
1335 kill = !LiveRegs.test(Reg); in fixupKills()
1366 LiveRegs.set(*SubRegs); in fixupKills()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DLivePhysRegs.h51 SparseSet<unsigned> LiveRegs; variable
59 LiveRegs.setUniverse(TRI.getNumRegs()); in LivePhysRegs()
68 LiveRegs.clear(); in init()
69 LiveRegs.setUniverse(TRI.getNumRegs()); in init()
73 void clear() { LiveRegs.clear(); } in clear()
76 bool empty() const { return LiveRegs.empty(); } in empty()
84 LiveRegs.insert(*SubRegs); in addReg()
93 LiveRegs.erase(*R); in removeReg()
106 bool contains(unsigned Reg) const { return LiveRegs.count(Reg); } in contains()
148 const_iterator begin() const { return LiveRegs.begin(); } in begin()
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/external/llvm/include/llvm/CodeGen/
DLivePhysRegs.h45 SparseSet<unsigned> LiveRegs; variable
51 LivePhysRegs() : TRI(nullptr), LiveRegs() {} in LivePhysRegs()
56 LiveRegs.setUniverse(TRI->getNumRegs()); in LivePhysRegs()
63 LiveRegs.clear(); in init()
64 LiveRegs.setUniverse(TRI->getNumRegs()); in init()
68 void clear() { LiveRegs.clear(); } in clear()
71 bool empty() const { return LiveRegs.empty(); } in empty()
79 LiveRegs.insert(*SubRegs); in addReg()
88 LiveRegs.erase(*R); in removeReg()
100 bool contains(unsigned Reg) const { return LiveRegs.count(Reg); } in contains()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DGCNRegPressure.h102 LiveRegSet LiveRegs; variable
114 const decltype(LiveRegs) &getLiveRegs() const { return LiveRegs; } in decltype() argument
126 decltype(LiveRegs) moveLiveRegs() { in moveLiveRegs()
127 return std::move(LiveRegs); in moveLiveRegs()
130 static void printLiveRegs(raw_ostream &OS, const LiveRegSet& LiveRegs,
140 void reset(const MachineInstr &MI, const LiveRegSet *LiveRegs = nullptr);
164 bool reset(const MachineInstr &MI, const LiveRegSet *LiveRegs = nullptr);
208 Range &&LiveRegs) { in getRegPressure() argument
210 for (const auto &RM : LiveRegs) in getRegPressure()
DGCNRegPressure.cpp275 GCNRPTracker::LiveRegSet LiveRegs; in getLiveRegs() local
282 LiveRegs[Reg] = LiveMask; in getLiveRegs()
284 return LiveRegs; in getLiveRegs()
293 if (&LiveRegs != LiveRegsCopy) in reset()
294 LiveRegs = *LiveRegsCopy; in reset()
296 LiveRegs = After ? getLiveRegsAfter(MI, LIS) in reset()
300 MaxPressure = CurPressure = getRegPressure(*MRI, LiveRegs); in reset()
321 auto LiveMask = LiveRegs[U.RegUnit]; in recede()
333 auto I = LiveRegs.find(Reg); in recede()
334 if (I == LiveRegs.end()) in recede()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZExpandPseudo.cpp77 LivePhysRegs LiveRegs(TII->getRegisterInfo()); in expandLOCRMux() local
78 LiveRegs.addLiveOuts(MBB); in expandLOCRMux()
80 LiveRegs.stepBackward(*I); in expandLOCRMux()
87 for (auto I = LiveRegs.begin(); I != LiveRegs.end(); ++I) in expandLOCRMux()
94 for (auto I = LiveRegs.begin(); I != LiveRegs.end(); ++I) in expandLOCRMux()
DSystemZShortenInst.cpp53 LivePhysRegs LiveRegs; member in __anond2b3bf570111::SystemZShortenInst
90 if (LiveRegs.contains(OtherReg)) in shortenIIF()
145 if (!LiveRegs.contains(SystemZ::CC) && shortenOn001(MI, Opcode)) { in shortenOn001AddCC()
184 LiveRegs.clear(); in processBlock()
185 LiveRegs.addLiveOuts(MBB); in processBlock()
305 LiveRegs.stepBackward(MI); in processBlock()
318 LiveRegs.init(*TRI); in runOnMachineFunction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86FixupBWInsts.cpp139 LivePhysRegs LiveRegs; member in __anonecd80dfa0111::FixupBWInstPass
156 LiveRegs.init(TII->getRegisterInfo()); in runOnMachineFunction()
192 if (!LiveRegs.contains(SuperDestReg)) { in getSuperRegDestIfDead()
200 if (!LiveRegs.contains(getX86SubSuperRegister(OrigDestReg, 16)) && in getSuperRegDestIfDead()
201 !LiveRegs.contains(getX86SubSuperRegister(SuperDestReg, 8, in getSuperRegDestIfDead()
386 LiveRegs.clear(); in processBasicBlock()
388 LiveRegs.addLiveOuts(MBB); in processBasicBlock()
397 LiveRegs.stepBackward(*MI); in processBasicBlock()
/external/llvm/lib/Target/X86/
DX86FixupBWInsts.cpp144 LivePhysRegs LiveRegs; member in __anon8b8e94a20111::FixupBWInstPass
161 LiveRegs.init(&TII->getRegisterInfo()); in runOnMachineFunction()
199 if (LiveRegs.contains(SuperDestReg)) in getSuperRegDestIfDead()
209 if (LiveRegs.contains(UpperByteReg)) in getSuperRegDestIfDead()
341 LiveRegs.clear(); in processBasicBlock()
343 LiveRegs.addLiveOuts(MBB); in processBasicBlock()
359 LiveRegs.stepBackward(*MI); in processBasicBlock()
/external/llvm/lib/Target/SystemZ/
DSystemZShortenInst.cpp53 LivePhysRegs LiveRegs; member in __anon894b38ff0111::SystemZShortenInst
90 if (LiveRegs.contains(OtherReg)) in shortenIIF()
145 if (!LiveRegs.contains(SystemZ::CC) && shortenOn001(MI, Opcode)) { in shortenOn001AddCC()
184 LiveRegs.clear(); in processBlock()
185 LiveRegs.addLiveOuts(MBB); in processBlock()
265 LiveRegs.stepBackward(MI); in processBlock()
278 LiveRegs.init(TRI); in runOnMachineFunction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsExpandPseudo.cpp192 LivePhysRegs LiveRegs; in expandAtomicCmpSwapSubword() local
193 computeAndAddLiveIns(LiveRegs, *loop1MBB); in expandAtomicCmpSwapSubword()
194 computeAndAddLiveIns(LiveRegs, *loop2MBB); in expandAtomicCmpSwapSubword()
195 computeAndAddLiveIns(LiveRegs, *sinkMBB); in expandAtomicCmpSwapSubword()
196 computeAndAddLiveIns(LiveRegs, *exitMBB); in expandAtomicCmpSwapSubword()
293 LivePhysRegs LiveRegs; in expandAtomicCmpSwap() local
294 computeAndAddLiveIns(LiveRegs, *loop1MBB); in expandAtomicCmpSwap()
295 computeAndAddLiveIns(LiveRegs, *loop2MBB); in expandAtomicCmpSwap()
296 computeAndAddLiveIns(LiveRegs, *exitMBB); in expandAtomicCmpSwap()
472 LivePhysRegs LiveRegs; in expandAtomicBinOpSubword() local
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/external/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp592 static void addPostLoopLiveIns(MachineBasicBlock *MBB, LivePhysRegs &LiveRegs) { in addPostLoopLiveIns() argument
593 for (auto I = LiveRegs.begin(); I != LiveRegs.end(); ++I) in addPostLoopLiveIns()
609 LivePhysRegs LiveRegs(&TII->getRegisterInfo()); in expandCMP_SWAP() local
610 LiveRegs.addLiveOuts(MBB); in expandCMP_SWAP()
612 LiveRegs.stepBackward(*I); in expandCMP_SWAP()
630 addPostLoopLiveIns(LoadCmpBB, LiveRegs); in expandCMP_SWAP()
650 addPostLoopLiveIns(StoreBB, LiveRegs); in expandCMP_SWAP()
663 addPostLoopLiveIns(DoneBB, LiveRegs); in expandCMP_SWAP()
687 LivePhysRegs LiveRegs(&TII->getRegisterInfo()); in expandCMP_SWAP_128() local
688 LiveRegs.addLiveOuts(MBB); in expandCMP_SWAP_128()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp656 LivePhysRegs LiveRegs; in expandCMP_SWAP() local
657 computeAndAddLiveIns(LiveRegs, *DoneBB); in expandCMP_SWAP()
658 computeAndAddLiveIns(LiveRegs, *StoreBB); in expandCMP_SWAP()
659 computeAndAddLiveIns(LiveRegs, *LoadCmpBB); in expandCMP_SWAP()
662 computeAndAddLiveIns(LiveRegs, *StoreBB); in expandCMP_SWAP()
664 computeAndAddLiveIns(LiveRegs, *LoadCmpBB); in expandCMP_SWAP()
749 LivePhysRegs LiveRegs; in expandCMP_SWAP_128() local
750 computeAndAddLiveIns(LiveRegs, *DoneBB); in expandCMP_SWAP_128()
751 computeAndAddLiveIns(LiveRegs, *StoreBB); in expandCMP_SWAP_128()
752 computeAndAddLiveIns(LiveRegs, *LoadCmpBB); in expandCMP_SWAP_128()
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/external/llvm/lib/Target/ARM/
DARMExpandPseudoInsts.cpp755 static void addPostLoopLiveIns(MachineBasicBlock *MBB, LivePhysRegs &LiveRegs) { in addPostLoopLiveIns() argument
756 for (auto I = LiveRegs.begin(); I != LiveRegs.end(); ++I) in addPostLoopLiveIns()
777 LivePhysRegs LiveRegs(&TII->getRegisterInfo()); in ExpandCMP_SWAP() local
778 LiveRegs.addLiveOuts(MBB); in ExpandCMP_SWAP()
780 LiveRegs.stepBackward(*I); in ExpandCMP_SWAP()
807 addPostLoopLiveIns(LoadCmpBB, LiveRegs); in ExpandCMP_SWAP()
834 addPostLoopLiveIns(StoreBB, LiveRegs); in ExpandCMP_SWAP()
857 addPostLoopLiveIns(DoneBB, LiveRegs); in ExpandCMP_SWAP()
899 LivePhysRegs LiveRegs(&TII->getRegisterInfo()); in ExpandCMP_SWAP_64() local
900 LiveRegs.addLiveOuts(MBB); in ExpandCMP_SWAP_64()
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