Searched refs:LoVec (Results 1 – 3 of 3) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonPatternsHVX.td | 35 def LoVec: OutPatFrag<(ops node:$Vs), (EXTRACT_SUBREG $Vs, vsub_lo)>; 312 def: Pat<(VecI16 (sext_invec HVI8:$Vs)), (LoVec (VSxtb $Vs))>; 313 def: Pat<(VecI32 (sext_invec HVI16:$Vs)), (LoVec (VSxth $Vs))>; 315 (LoVec (VSxth (LoVec (VSxtb $Vs))))>; 316 def: Pat<(VecPI16 (sext_invec HWI8:$Vss)), (VSxtb (LoVec $Vss))>; 317 def: Pat<(VecPI32 (sext_invec HWI16:$Vss)), (VSxth (LoVec $Vss))>; 319 (VSxth (LoVec (VSxtb (LoVec $Vss))))>; 321 def: Pat<(VecI16 (zext_invec HVI8:$Vs)), (LoVec (VZxtb $Vs))>; 322 def: Pat<(VecI32 (zext_invec HVI16:$Vs)), (LoVec (VZxth $Vs))>; 324 (LoVec (VZxth (LoVec (VZxtb $Vs))))>; [all …]
|
D | HexagonISelLoweringHVX.cpp | 1319 auto LoVec = [&DAG,ResTy,dl] (SDValue Pair) { in LowerHvxMulh() local 1336 SDValue T1 = getInstr(Hexagon::V6_vlsrw, dl, ResTy, {LoVec(T0), S16}, DAG); in LowerHvxMulh() 1346 {LoVec(T2), HiVec(T2)}, DAG); in LowerHvxMulh() 1348 SDValue T4 = DAG.getNode(ISD::ADD, dl, ResTy, {T1, LoVec(T3)}); in LowerHvxMulh()
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 4223 SDValue LoVec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i16, LoHalf); in lowerINSERT_VECTOR_ELT() local 4229 InsertLo ? LoVec : HiVec, in lowerINSERT_VECTOR_ELT()
|