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Searched refs:M15 (Results 1 – 13 of 13) sorted by relevance

/external/u-boot/board/compulab/cl-som-am57x/
Dmux.c43 {UART1_CTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART1_CTSN */
44 {UART1_RTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART1_RTSN */
45 {UART2_RXD, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_RXD */
46 {UART2_TXD, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_TXD */
47 {UART2_CTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_CTSN */
48 {UART2_RTSN, (M15 | PIN_INPUT_PULLDOWN)}, /* UART2_RTSN */
/external/u-boot/board/ti/dra7xx/
Dmux_data.h147 {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */
159 {WAKEUP0, (M15 | PULL_UP)}, /* Wakeup0.safe for dcan1_rx */
357 {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */
369 {WAKEUP0, (M15 | PULL_UP)}, /* Wakeup0.safe for dcan1_rx */
681 {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */
693 {WAKEUP0, (M15 | PULL_UP)}, /* Wakeup0.safe for dcan1_rx */
753 {VIN2A_DE0, (M15 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_de0.Driveroff */
844 {MCASP2_ACLKR, (M15 | PIN_INPUT_PULLUP)}, /* mcasp2_aclkr.Driveroff */
/external/u-boot/arch/arm/include/asm/arch-omap5/
Dmux_dra7xx.h44 #define M15 15 macro
68 #define SAFE_MODE M15
/external/mesa3d/src/mesa/sparc/
Dsparc_matrix.h50 #define M15 %f31 macro
Dxform.S96 fadds %f4, M15, %f4 ! FGA
104 fadds %f12, M15, %f12 ! FGA Group f12 available
125 fadds %f4, M15, %f4 ! FGA Group
470 fadds %f5, M15, %f5 ! FGA Group f5 available
861 fadds %f6, M15, %f6 ! FGA Group f10,f6 available
1137 fmuls %f3, M15, %f11 ! FGM Group f15, f7 available
/external/u-boot/board/ti/am57xx/
Dmux_data.h489 {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */
490 {DCAN1_RX, (M15 | PULL_UP)}, /* dcan1_rx.safe for dcan1_rx */
709 {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */
710 {DCAN1_RX, (M15 | PULL_UP)}, /* dcan1_rx.safe for dcan1_rx */
896 {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */
897 {DCAN1_RX, (M15 | PULL_UP)}, /* dcan1_rx.safe for dcan1_rx */
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/X86/
Dx86-pshufb.ll473 define <16 x i8> @demanded_elts_insertion(<16 x i8> %InVec, <16 x i8> %BaseMask, i8 %M0, i8 %M15) {
480 %2 = insertelement <16 x i8> %1, i8 %M15, i32 15
/external/ImageMagick/PerlMagick/t/reference/write/read/
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/external/honggfuzz/examples/apache-httpd/corpus_http1/
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/external/honggfuzz/examples/apache-httpd/corpus_http2/
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/external/llvm/test/CodeGen/ARM/
Dbuild-attributes.ll1449 ; EXYNOS-M15: .eabi_attribute 68, 3