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Searched refs:MAC_MII_BUSY (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/mips/mach-au1x00/
Dau1x00_eth.c83 while (*mii_control_reg & MAC_MII_BUSY) { in au1x00_miiphy_read()
97 while (*mii_control_reg & MAC_MII_BUSY) { in au1x00_miiphy_read()
116 while (*mii_control_reg & MAC_MII_BUSY) { in au1x00_miiphy_write()
/external/u-boot/arch/mips/mach-au1x00/include/mach/
Dau1x00.h517 #define MAC_MII_BUSY (1<<0) macro