/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
D | HexagonMCInstrInfo.h | 46 MCInst::const_iterator BundleCurrent; 47 MCInst::const_iterator BundleEnd; 48 MCInst::const_iterator DuplexCurrent; 49 MCInst::const_iterator DuplexEnd; 52 PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst); 53 PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst, std::nullptr_t); 56 MCInst const &operator*() const; 80 void addConstant(MCInst &MI, uint64_t Value, MCContext &Context); 81 void addConstExtender(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB, 82 MCInst const &MCI); [all …]
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
D | HexagonMCInstrInfo.h | 25 class MCInst; variable 55 void addConstant(MCInst &MI, uint64_t Value, MCContext &Context); 56 void addConstExtender(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB, 57 MCInst const &MCI); 60 iterator_range<MCInst::const_iterator> bundleInstructions(MCInst const &MCI); 63 size_t bundleSize(MCInst const &MCI); 67 MCContext &Context, MCInst &MCB, 71 void clampExtended(MCInstrInfo const &MCII, MCContext &Context, MCInst &MCI); 73 MCInst createBundle(); 76 MCInst const *extenderForIndex(MCInst const &MCB, size_t Index); [all …]
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D | HexagonInstPrinter.h | 30 void printInst(MCInst const *MI, raw_ostream &O, StringRef Annot, 33 void printInstruction(MCInst const *MI, raw_ostream &O); 39 void printOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const; 40 void printExtOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const; 41 void printUnsignedImmOperand(MCInst const *MI, unsigned OpNo, 43 void printNegImmOperand(MCInst const *MI, unsigned OpNo, 45 void printNOneImmOperand(MCInst const *MI, unsigned OpNo, 47 void prints3_6ImmOperand(MCInst const *MI, unsigned OpNo, 49 void prints3_7ImmOperand(MCInst const *MI, unsigned OpNo, 51 void prints4_6ImmOperand(MCInst const *MI, unsigned OpNo, [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/InstPrinter/ |
D | AMDGPUInstPrinter.h | 27 void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI, 31 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, 37 void printU4ImmOperand(const MCInst *MI, unsigned OpNo, 39 void printU8ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 40 void printU16ImmOperand(const MCInst *MI, unsigned OpNo, 42 void printU4ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 43 void printU8ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 44 void printU16ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 45 void printS13ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 46 void printU32ImmOperand(const MCInst *MI, unsigned OpNo, [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/InstPrinter/ |
D | ARMInstPrinter.h | 28 virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot); 35 void printInstruction(const MCInst *MI, raw_ostream &O); 39 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 41 void printSORegRegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 42 void printSORegImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 44 void printAddrModeTBB(const MCInst *MI, unsigned OpNum, raw_ostream &O); 45 void printAddrModeTBH(const MCInst *MI, unsigned OpNum, raw_ostream &O); 46 void printAddrMode2Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 47 void printAM2PostIndexOp(const MCInst *MI, unsigned OpNum, raw_ostream &O); 48 void printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum, [all …]
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/external/llvm/lib/Target/AMDGPU/InstPrinter/ |
D | AMDGPUInstPrinter.h | 27 void printInstruction(const MCInst *MI, raw_ostream &O); 30 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, 36 void printU4ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 37 void printU8ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 38 void printU16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 39 void printU4ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 40 void printU8ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 41 void printU16ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 42 void printU32ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 43 void printNamedBit(const MCInst* MI, unsigned OpNo, raw_ostream& O, [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/InstPrinter/ |
D | ARMInstPrinter.h | 26 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, 31 void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI, 33 virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI, 35 virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx, 41 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 44 void printSORegRegOperand(const MCInst *MI, unsigned OpNum, 46 void printSORegImmOperand(const MCInst *MI, unsigned OpNum, 49 void printAddrModeTBB(const MCInst *MI, unsigned OpNum, 51 void printAddrModeTBH(const MCInst *MI, unsigned OpNum, 53 void printAddrMode2Operand(const MCInst *MI, unsigned OpNum, [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
D | instalias-imm-expanding.s | 11 # MIPS-NEXT: # <MCInst #{{[0-9]+}} ADD 14 # MICROMIPS-NEXT: # <MCInst #{{[0-9]+}} ADD_MM 19 # MIPS-NEXT: # <MCInst #{{[0-9]+}} ADD 23 # MICROMIPS-NEXT: # <MCInst #{{[0-9]+}} ADD_MM 26 # MIPS-NEXT: # <MCInst #{{[0-9]+}} ADDi 28 # MICROMIPS-NEXT: # <MCInst #{{[0-9]+}} ADDi_MM 31 # MIPS-NEXT: # <MCInst #{{[0-9]+}} ADDi 33 # MICROMIPS-NEXT: # <MCInst #{{[0-9]+}} ADDi_MM 37 # MIPS-NEXT: # <MCInst #{{[0-9]+}} ADD 40 # MICROMIPS-NEXT: # <MCInst #{{[0-9]+}} ADD_MM [all …]
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D | micromips-eva.s | 13 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} PREFE_MM 15 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} CACHEE_MM 17 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} LLE_MM 19 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} SCE_MM 21 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} SWRE_MM 23 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} SWLE_MM 25 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} LWRE_MM 27 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} LWLE_MM 29 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} LHuE_M 31 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} LBE_MM [all …]
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/external/llvm/lib/Target/ARM/InstPrinter/ |
D | ARMInstPrinter.h | 26 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, 31 void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI, 33 virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI, 35 virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx, 41 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 44 void printSORegRegOperand(const MCInst *MI, unsigned OpNum, 46 void printSORegImmOperand(const MCInst *MI, unsigned OpNum, 49 void printAddrModeTBB(const MCInst *MI, unsigned OpNum, 51 void printAddrModeTBH(const MCInst *MI, unsigned OpNum, 53 void printAddrMode2Operand(const MCInst *MI, unsigned OpNum, [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/InstPrinter/ |
D | AArch64InstPrinter.h | 29 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, 34 virtual void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI, 36 virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI, 38 virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx, 51 bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI, 54 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 56 void printImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 58 void printImmHex(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 61 void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm, 64 void printPostIncOperand(const MCInst *MI, unsigned OpNo, in printPostIncOperand() [all …]
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
D | AArch64InstPrinter.h | 27 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, 32 virtual void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI, 34 virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI, 36 virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx, 47 bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI, 50 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 52 void printImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 54 void printImmHex(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, 56 void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm, 59 void printPostIncOperand(const MCInst *MI, unsigned OpNo, in printPostIncOperand() [all …]
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/external/llvm/lib/Target/X86/InstPrinter/ |
D | X86ATTInstPrinter.h | 28 void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot, 33 bool printAliasInstr(const MCInst *MI, raw_ostream &OS); 34 void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx, 38 void printInstruction(const MCInst *MI, raw_ostream &OS); 41 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS); 42 void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &OS); 43 void printSSEAVXCC(const MCInst *MI, unsigned Op, raw_ostream &OS); 44 void printXOPCC(const MCInst *MI, unsigned Op, raw_ostream &OS); 45 void printPCRelImm(const MCInst *MI, unsigned OpNo, raw_ostream &OS); 46 void printSrcIdx(const MCInst *MI, unsigned OpNo, raw_ostream &OS); [all …]
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D | X86IntelInstPrinter.h | 29 void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot, 33 void printInstruction(const MCInst *MI, raw_ostream &O); 36 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 37 void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O); 38 void printSSEAVXCC(const MCInst *MI, unsigned Op, raw_ostream &O); 39 void printXOPCC(const MCInst *MI, unsigned Op, raw_ostream &O); 40 void printPCRelImm(const MCInst *MI, unsigned OpNo, raw_ostream &O); 41 void printMemOffset(const MCInst *MI, unsigned OpNo, raw_ostream &O); 42 void printSrcIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O); 43 void printDstIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O); [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsMCCodeEmitter.h | 25 class MCInst; variable 51 void encodeInstruction(const MCInst &MI, raw_ostream &OS, 57 uint64_t getBinaryCodeForInstr(const MCInst &MI, 64 unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo, 71 unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo, 77 unsigned getUImm5Lsl2Encoding(const MCInst &MI, unsigned OpNo, 81 unsigned getSImm3Lsa2Value(const MCInst &MI, unsigned OpNo, 85 unsigned getUImm6Lsl2Encoding(const MCInst &MI, unsigned OpNo, 91 unsigned getSImm9AddiuspValue(const MCInst &MI, unsigned OpNo, 98 unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo, [all …]
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsMCCodeEmitter.h | 26 class MCInst; variable 54 void encodeInstruction(const MCInst &MI, raw_ostream &OS, 60 uint64_t getBinaryCodeForInstr(const MCInst &MI, 67 unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo, 74 unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo, 80 unsigned getUImm5Lsl2Encoding(const MCInst &MI, unsigned OpNo, 84 unsigned getSImm3Lsa2Value(const MCInst &MI, unsigned OpNo, 88 unsigned getUImm6Lsl2Encoding(const MCInst &MI, unsigned OpNo, 94 unsigned getSImm9AddiuspValue(const MCInst &MI, unsigned OpNo, 101 unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo, [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/InstPrinter/ |
D | X86ATTInstPrinter.h | 28 void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot, 33 bool printAliasInstr(const MCInst *MI, raw_ostream &OS); 34 void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx, 38 void printInstruction(const MCInst *MI, raw_ostream &OS); 41 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS) override; 42 void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &OS); 43 void printMemOffset(const MCInst *MI, unsigned OpNo, raw_ostream &OS); 44 void printSrcIdx(const MCInst *MI, unsigned Op, raw_ostream &O); 45 void printDstIdx(const MCInst *MI, unsigned Op, raw_ostream &O); 46 void printU8Imm(const MCInst *MI, unsigned Op, raw_ostream &OS); [all …]
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D | X86IntelInstPrinter.h | 29 void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot, 33 void printInstruction(const MCInst *MI, raw_ostream &O); 36 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) override; 37 void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O); 38 void printMemOffset(const MCInst *MI, unsigned OpNo, raw_ostream &O); 39 void printSrcIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O); 40 void printDstIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O); 41 void printU8Imm(const MCInst *MI, unsigned Op, raw_ostream &O); 43 void printanymem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { in printanymem() 47 void printopaquemem(const MCInst *MI, unsigned OpNo, raw_ostream &O) { in printopaquemem() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/InstPrinter/ |
D | PPCInstPrinter.h | 36 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, 40 void printInstruction(const MCInst *MI, raw_ostream &O); 43 bool printAliasInstr(const MCInst *MI, raw_ostream &OS); 44 void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx, 48 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 49 void printPredicateOperand(const MCInst *MI, unsigned OpNo, 51 void printATBitsAsHint(const MCInst *MI, unsigned OpNo, raw_ostream &O); 53 void printU1ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 54 void printU2ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 55 void printU3ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); [all …]
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/external/llvm/lib/Target/PowerPC/InstPrinter/ |
D | PPCInstPrinter.h | 33 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, 37 void printInstruction(const MCInst *MI, raw_ostream &O); 40 bool printAliasInstr(const MCInst *MI, raw_ostream &OS); 41 void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx, 45 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 46 void printPredicateOperand(const MCInst *MI, unsigned OpNo, 49 void printU1ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 50 void printU2ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 51 void printU3ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 52 void printU4ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/InstPrinter/ |
D | SystemZInstPrinter.h | 31 void printInstruction(const MCInst *MI, raw_ostream &O); 44 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, 49 void printOperand(const MCInst *MI, int OpNum, raw_ostream &O); 50 void printBDAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 51 void printBDXAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 52 void printBDLAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 53 void printBDRAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 54 void printBDVAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 55 void printU1ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O); 56 void printU2ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O); [all …]
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/external/llvm/lib/Target/SystemZ/InstPrinter/ |
D | SystemZInstPrinter.h | 29 void printInstruction(const MCInst *MI, raw_ostream &O); 42 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, 47 void printOperand(const MCInst *MI, int OpNum, raw_ostream &O); 48 void printBDAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 49 void printBDXAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 50 void printBDLAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 51 void printBDVAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O); 52 void printU1ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O); 53 void printU2ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O); 54 void printU3ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O); [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/ |
D | load.ll | 20 ; MIPS32-NEXT: lui $1, %hi(a) # <MCInst #{{[0-9]+}} LUi 23 ; MIPS32-NEXT: jr $ra # <MCInst #{{[0-9]+}} JR 25 ; MIPS32-NEXT: lbu $2, %lo(a)($1) # <MCInst #{{[0-9]+}} LBu 32 ; MMR3-NEXT: lui $1, %hi(a) # <MCInst #{{[0-9]+}} LUi 35 ; MMR3-NEXT: jr $ra # <MCInst #{{[0-9]+}} JR_MM 37 ; MMR3-NEXT: lbu $2, %lo(a)($1) # <MCInst #{{[0-9]+}} LBu_MM 44 ; MIPS32R6-NEXT: lui $1, %hi(a) # <MCInst #{{[0-9]+}} LUi 47 ; MIPS32R6-NEXT: jr $ra # <MCInst #{{[0-9]+}} JALR 50 ; MIPS32R6-NEXT: lbu $2, %lo(a)($1) # <MCInst #{{[0-9]+}} LBu 57 ; MMR6-NEXT: lui $1, %hi(a) # <MCInst #{{[0-9]+}} LUi [all …]
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D | store.ll | 19 ; MIPS32-NEXT: lui $1, %hi(a) # <MCInst #{{[0-9]+}} LUi 22 ; MIPS32-NEXT: jr $ra # <MCInst #{{[0-9]+}} JR 24 ; MIPS32-NEXT: sb $4, %lo(a)($1) # <MCInst #{{[0-9]+}} SB 31 ; MMR3-NEXT: lui $1, %hi(a) # <MCInst #{{[0-9]+}} LUi 34 ; MMR3-NEXT: jr $ra # <MCInst #{{[0-9]+}} JR_MM 36 ; MMR3-NEXT: sb $4, %lo(a)($1) # <MCInst #{{[0-9]+}} SB_MM 43 ; MIPS32R6-NEXT: lui $1, %hi(a) # <MCInst #{{[0-9]+}} LUi 46 ; MIPS32R6-NEXT: jr $ra # <MCInst #{{[0-9]+}} JALR 49 ; MIPS32R6-NEXT: sb $4, %lo(a)($1) # <MCInst #{{[0-9]+}} SB 56 ; MMR6-NEXT: lui $1, %hi(a) # <MCInst #{{[0-9]+}} LUi [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips/ |
D | valid.s | 5 # CHECK: # <MCInst #{{.*}} ADDIUSP_MM 7 # CHECK: # <MCInst #{{.*}} ADDIUSP_MM 9 # CHECK: # <MCInst #{{.*}} ADDIUSP_MM 11 # CHECK: # <MCInst #{{.*}} ADDIUSP_MM 13 # CHECK: # <MCInst #{{.*}} ADDIUSP_MM 15 # CHECK: # <MCInst #{{.*}} ANDI16_MM 17 # CHECK: # <MCInst #{{.*}} JRADDIUSP 19 # CHECK: # <MCInst #{{.*}} ADDU16_MM 21 # CHECK: # <MCInst #{{.*}} SUBU16_MM 23 # CHECK: # <MCInst #{{.*}} AND16_MM [all …]
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