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Searched refs:MCInst_getNumOperands (Results 1 – 15 of 15) sorted by relevance

/external/capstone/arch/Sparc/
DSparcGenAsmWriter.inc1227 if (MCInst_getNumOperands(MI) == 2 &&
1234 if (MCInst_getNumOperands(MI) == 2 &&
1241 if (MCInst_getNumOperands(MI) == 2 &&
1248 if (MCInst_getNumOperands(MI) == 2 &&
1255 if (MCInst_getNumOperands(MI) == 2 &&
1262 if (MCInst_getNumOperands(MI) == 2 &&
1269 if (MCInst_getNumOperands(MI) == 2 &&
1276 if (MCInst_getNumOperands(MI) == 2 &&
1283 if (MCInst_getNumOperands(MI) == 2 &&
1290 if (MCInst_getNumOperands(MI) == 2 &&
[all …]
DSparcInstPrinter.c111 if (MCInst_getNumOperands(MI) != 3) in printSparcAliasInstr()
144 if (MI->csh->mode & CS_MODE_V9 || (MCInst_getNumOperands(MI) != 3) || in printSparcAliasInstr()
/external/capstone/arch/PowerPC/
DPPCGenAsmWriter.inc4296 if (MCInst_getNumOperands(MI) == 3 &&
4305 if (MCInst_getNumOperands(MI) == 3 &&
4313 if (MCInst_getNumOperands(MI) == 3 &&
4322 if (MCInst_getNumOperands(MI) == 3 &&
4330 if (MCInst_getNumOperands(MI) == 3 &&
4339 if (MCInst_getNumOperands(MI) == 3 &&
4347 if (MCInst_getNumOperands(MI) == 3 &&
4356 if (MCInst_getNumOperands(MI) == 3 &&
4364 if (MCInst_getNumOperands(MI) == 3 &&
4373 if (MCInst_getNumOperands(MI) == 3 &&
[all …]
DPPCInstPrinter.c781 if (MCInst_getNumOperands(MI) == 3 && in printAliasInstrEx()
789 if (MCInst_getNumOperands(MI) == 3 && in printAliasInstrEx()
797 if (MCInst_getNumOperands(MI) == 3 && in printAliasInstrEx()
828 if (MCInst_getNumOperands(MI) == 3 && in printAliasInstrEx()
836 if (MCInst_getNumOperands(MI) == 3 && in printAliasInstrEx()
844 if (MCInst_getNumOperands(MI) == 3 && in printAliasInstrEx()
875 if (MCInst_getNumOperands(MI) == 3 && in printAliasInstrEx()
889 if (MCInst_getNumOperands(MI) == 3 && in printAliasInstrEx()
/external/capstone/arch/AArch64/
DAArch64GenAsmWriter.inc7086 if (MCInst_getNumOperands(MI) == 4 &&
7096 if (MCInst_getNumOperands(MI) == 4 &&
7108 if (MCInst_getNumOperands(MI) == 4 &&
7118 if (MCInst_getNumOperands(MI) == 4 &&
7133 if (MCInst_getNumOperands(MI) == 4 &&
7145 if (MCInst_getNumOperands(MI) == 4 &&
7155 if (MCInst_getNumOperands(MI) == 4 &&
7170 if (MCInst_getNumOperands(MI) == 4 &&
7180 if (MCInst_getNumOperands(MI) == 4 &&
7192 if (MCInst_getNumOperands(MI) == 4 &&
[all …]
/external/capstone/arch/ARM/
DARMGenAsmWriter.inc8702 if (MCInst_getNumOperands(MI) == 6 &&
8711 if (MCInst_getNumOperands(MI) == 6 &&
8722 if (MCInst_getNumOperands(MI) == 6 &&
8731 if (MCInst_getNumOperands(MI) == 6 &&
8742 if (MCInst_getNumOperands(MI) == 1 &&
8751 if (MCInst_getNumOperands(MI) == 4 &&
8760 if (MCInst_getNumOperands(MI) == 4 &&
8769 if (MCInst_getNumOperands(MI) == 1 &&
8778 if (MCInst_getNumOperands(MI) == 1 &&
8787 if (MCInst_getNumOperands(MI) == 4 &&
[all …]
DARMInstPrinter.c530 MCInst_getNumOperands(MI) > 5) { in ARM_printInst()
565 MCInst_getNumOperands(MI) > 5) { in ARM_printInst()
635 for (i = 3; i < MCInst_getNumOperands(MI); ++i) { in ARM_printInst()
687 for(i = isStore ? 3 : 2; i < MCInst_getNumOperands(MI); ++i) in ARM_printInst()
1387 for (i = OpNum, e = MCInst_getNumOperands(MI); i != e; ++i) { in printRegisterList()
DARMDisassembler.c562 if (i == MCInst_getNumOperands(MI)) break; in AddThumb1SBit()
632 if (i == MCInst_getNumOperands(MI)) break; in AddThumbPredicate()
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc5069 if (MCInst_getNumOperands(MI) == 3 &&
5081 if (MCInst_getNumOperands(MI) == 2 &&
5089 if (MCInst_getNumOperands(MI) == 2 &&
5097 if (MCInst_getNumOperands(MI) == 2 &&
5105 if (MCInst_getNumOperands(MI) == 2 &&
5113 if (MCInst_getNumOperands(MI) == 2 &&
5121 if (MCInst_getNumOperands(MI) == 2 &&
5129 if (MCInst_getNumOperands(MI) == 2 &&
5137 if (MCInst_getNumOperands(MI) == 2 &&
5145 if (MCInst_getNumOperands(MI) == 2 &&
[all …]
/external/capstone/
DMCInst.h128 unsigned MCInst_getNumOperands(const MCInst *inst);
DMCInst.c69 unsigned MCInst_getNumOperands(const MCInst *inst) in MCInst_getNumOperands() function
/external/capstone/arch/X86/
DX86GenAsmWriter1_reduce.inc2780 if (MCInst_getNumOperands(MI) == 1 &&
2789 if (MCInst_getNumOperands(MI) == 1 &&
2798 if (MCInst_getNumOperands(MI) == 0) {
DX86GenAsmWriter_reduce.inc3094 if (MCInst_getNumOperands(MI) == 1 &&
3103 if (MCInst_getNumOperands(MI) == 1 &&
3112 if (MCInst_getNumOperands(MI) == 0) {
DX86GenAsmWriter.inc15661 if (MCInst_getNumOperands(MI) == 1 &&
15670 if (MCInst_getNumOperands(MI) == 1 &&
15679 if (MCInst_getNumOperands(MI) == 6 &&
15688 if (MCInst_getNumOperands(MI) == 0) {
DX86GenAsmWriter1.inc15058 if (MCInst_getNumOperands(MI) == 1 &&
15067 if (MCInst_getNumOperands(MI) == 1 &&
15076 if (MCInst_getNumOperands(MI) == 6 &&
15085 if (MCInst_getNumOperands(MI) == 0) {