| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 39 class MCInstrDesc; variable
300 const MCInstrDesc &MCID) { in BuildMI()
307 const MCInstrDesc &MCID, unsigned DestReg) { in BuildMI()
317 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI()
333 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI()
342 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI()
352 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI()
363 const MCInstrDesc &MCID) { in BuildMI()
373 const MCInstrDesc &MCID) { in BuildMI()
382 const MCInstrDesc &MCID) { in BuildMI()
[all …]
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 28 class MCInstrDesc; variable
243 const MCInstrDesc &MCID) { in BuildMI()
250 const MCInstrDesc &MCID, unsigned DestReg) { in BuildMI()
260 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI()
276 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI()
285 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI()
295 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI()
306 const MCInstrDesc &MCID) { in BuildMI()
316 const MCInstrDesc &MCID) { in BuildMI()
325 const MCInstrDesc &MCID) { in BuildMI()
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| D | DFAPacketizer.h | 36 class MCInstrDesc; variable
104 bool canReserveResources(const llvm::MCInstrDesc *MID);
108 void reserveResources(const llvm::MCInstrDesc *MID);
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/MC/ |
| D | MCInstrDesc.cpp | 22 bool MCInstrDesc::getDeprecatedInfo(MCInst &MI, const MCSubtargetInfo &STI, in getDeprecatedInfo()
33 bool MCInstrDesc::mayAffectControlFlow(const MCInst &MI, in mayAffectControlFlow()
54 bool MCInstrDesc::hasImplicitDefOfPhysReg(unsigned Reg, in hasImplicitDefOfPhysReg()
63 bool MCInstrDesc::hasDefOfPhysReg(const MCInst &MI, unsigned Reg, in hasDefOfPhysReg()
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| /external/llvm/lib/MC/ |
| D | MCInstrDesc.cpp | 22 bool MCInstrDesc::getDeprecatedInfo(MCInst &MI, const MCSubtargetInfo &STI, in getDeprecatedInfo()
33 bool MCInstrDesc::mayAffectControlFlow(const MCInst &MI, in mayAffectControlFlow()
54 bool MCInstrDesc::hasImplicitDefOfPhysReg(unsigned Reg, in hasImplicitDefOfPhysReg()
63 bool MCInstrDesc::hasDefOfPhysReg(const MCInst &MI, unsigned Reg, in hasDefOfPhysReg()
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| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 25 class MCInstrDesc; variable
183 const MCInstrDesc &MCID) { in BuildMI()
192 const MCInstrDesc &MCID, in BuildMI()
205 const MCInstrDesc &MCID, in BuildMI()
219 const MCInstrDesc &MCID) { in BuildMI()
231 const MCInstrDesc &MCID) { in BuildMI()
241 const MCInstrDesc &MCID, in BuildMI()
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| D | MachineInstr.h | 61 const MCInstrDesc *MCID; // Instruction descriptor.
103 explicit MachineInstr(const MCInstrDesc &MCID, bool NoImp = false);
108 MachineInstr(MachineBasicBlock *MBB, const MCInstrDesc &MCID);
113 explicit MachineInstr(const MCInstrDesc &MCID, const DebugLoc dl,
120 const MCInstrDesc &MCID);
191 const MCInstrDesc &getDesc() const { return *MCID; }
532 void setDesc(const MCInstrDesc &tid) { MCID = &tid; }
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| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| D | MCInstrInfo.h | 27 const MCInstrDesc *Desc; // Raw array to allow static init'n
33 void InitMCInstrInfo(const MCInstrDesc *D, unsigned NO) { in InitMCInstrInfo()
43 const MCInstrDesc &get(unsigned Opcode) const { in get()
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| /external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-exegesis/lib/ |
| D | MCInstrDescView.cpp | 20 Instruction::Instruction(const llvm::MCInstrDesc &MCInstrDesc, in Instruction() argument
22 : Description(&MCInstrDesc) { in Instruction()
24 for (; OpIndex < MCInstrDesc.getNumOperands(); ++OpIndex) { in Instruction()
25 const auto &OpInfo = MCInstrDesc.opInfo_begin()[OpIndex]; in Instruction()
28 Operand.IsDef = (OpIndex < MCInstrDesc.getNumDefs()); in Instruction()
34 MCInstrDesc.getOperandConstraint(OpIndex, llvm::MCOI::TIED_TO); in Instruction()
38 for (const llvm::MCPhysReg *MCPhysReg = MCInstrDesc.getImplicitDefs(); in Instruction()
48 for (const llvm::MCPhysReg *MCPhysReg = MCInstrDesc.getImplicitUses(); in Instruction()
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| D | Latency.cpp | 35 const llvm::MCInstrDesc &MCInstrDesc) const { in isInfeasible()
36 if (llvm::any_of(MCInstrDesc.operands(), hasUnknownOperand)) in isInfeasible()
39 if (llvm::any_of(MCInstrDesc.operands(), hasMemoryOperand)) in isInfeasible()
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| /external/llvm/include/llvm/MC/ |
| D | MCInstrInfo.h | 25 const MCInstrDesc *Desc; // Raw array to allow static init'n
33 void InitMCInstrInfo(const MCInstrDesc *D, const unsigned *NI, const char *ND, in InitMCInstrInfo()
45 const MCInstrDesc &get(unsigned Opcode) const { in get()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
| D | MCInstrInfo.h | 25 const MCInstrDesc *Desc; // Raw array to allow static init'n
33 void InitMCInstrInfo(const MCInstrDesc *D, const unsigned *NI, const char *ND, in InitMCInstrInfo()
45 const MCInstrDesc &get(unsigned Opcode) const { in get()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCHazardRecognizers.cpp | 31 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isLoadAfterStore()
41 const MCInstrDesc *PredMCID = DAG->getInstrDesc(SU->Preds[i].getSUnit()); in isLoadAfterStore()
57 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isBCTRAfterSet()
67 const MCInstrDesc *PredMCID = DAG->getInstrDesc(SU->Preds[i].getSUnit()); in isBCTRAfterSet()
87 bool PPCDispatchGroupSBHazardRecognizer::mustComeFirst(const MCInstrDesc *MCID, in mustComeFirst()
149 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in ShouldPreferAnother()
177 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in EmitInstruction()
285 const MCInstrDesc &MCID = DAG.TII->get(Opcode); in GetInstrType()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCHazardRecognizers.cpp | 31 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isLoadAfterStore()
41 const MCInstrDesc *PredMCID = DAG->getInstrDesc(SU->Preds[i].getSUnit()); in isLoadAfterStore()
57 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isBCTRAfterSet()
67 const MCInstrDesc *PredMCID = DAG->getInstrDesc(SU->Preds[i].getSUnit()); in isBCTRAfterSet()
87 bool PPCDispatchGroupSBHazardRecognizer::mustComeFirst(const MCInstrDesc *MCID, in mustComeFirst()
149 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in ShouldPreferAnother()
177 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in EmitInstruction()
285 const MCInstrDesc &MCID = DAG.TII->get(Opcode); in GetInstrType()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.h | 25 class MCInstrDesc; variable
52 const MCInstrDesc &II,
66 const MCInstrDesc *II,
76 const MCInstrDesc *II,
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.h | 26 class MCInstrDesc; variable
53 const MCInstrDesc &II,
68 const MCInstrDesc *II,
79 const MCInstrDesc *II,
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.h | 26 class MCInstrDesc; variable
53 const MCInstrDesc &II,
68 const MCInstrDesc *II,
79 const MCInstrDesc *II,
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 307 const MCInstrDesc &DefMCID,
311 const MCInstrDesc &DefMCID,
315 const MCInstrDesc &UseMCID,
319 const MCInstrDesc &UseMCID,
323 const MCInstrDesc &DefMCID,
325 const MCInstrDesc &UseMCID,
330 const MCInstrDesc &DefMCID, unsigned DefAdj,
333 const MCInstrDesc &UseMCID, unsigned UseAdj) const;
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| D | ARMHazardRecognizer.cpp | 22 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard()
43 const MCInstrDesc &MCID = MI->getDesc(); in getHazardType()
46 const MCInstrDesc &LastMCID = LastMI->getDesc(); in getHazardType()
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| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.h | 100 const MCInstrDesc& getBrCond(SystemZCC::CondCodes CC) const;
101 const MCInstrDesc& getLongDispOpc(unsigned Opc) const;
103 const MCInstrDesc& getMemoryInstr(unsigned Opc, int64_t Offset = 0) const {
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 338 const MCInstrDesc &DefMCID,
342 const MCInstrDesc &DefMCID,
346 const MCInstrDesc &UseMCID,
350 const MCInstrDesc &UseMCID,
354 const MCInstrDesc &DefMCID,
356 const MCInstrDesc &UseMCID,
361 const MCInstrDesc &DefMCID, unsigned DefAdj,
364 const MCInstrDesc &UseMCID, unsigned UseAdj) const;
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| D | ARMHazardRecognizer.cpp | 22 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard()
43 const MCInstrDesc &MCID = MI->getDesc(); in getHazardType()
46 const MCInstrDesc &LastMCID = LastMI->getDesc(); in getHazardType()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 223 const MCInstrDesc &DefMCID,
227 const MCInstrDesc &DefMCID,
231 const MCInstrDesc &UseMCID,
235 const MCInstrDesc &UseMCID,
239 const MCInstrDesc &DefMCID,
241 const MCInstrDesc &UseMCID,
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| D | ARMCodeEmitter.cpp | 99 const MCInstrDesc &MCID,
105 const MCInstrDesc &MCID) const;
450 const MCInstrDesc &MCID = MI.getDesc(); in getMachineOpValue()
765 const MCInstrDesc &MCID = MI.getDesc(); in emitLEApcrelJTInstruction()
920 const MCInstrDesc &MCID, in getMachineSoRegOpValue()
990 const MCInstrDesc &MCID) const { in getAddrModeSBit()
1002 const MCInstrDesc &MCID = MI.getDesc(); in emitDataProcessingInstruction()
1100 const MCInstrDesc &MCID = MI.getDesc(); in emitLoadStoreInstruction()
1178 const MCInstrDesc &MCID = MI.getDesc(); in emitMiscLoadStoreInstruction()
1263 const MCInstrDesc &MCID = MI.getDesc(); in emitLoadStoreMultipleInstruction()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/Utils/ |
| D | AMDGPUBaseInfo.h | 375 bool isSISrcOperand(const MCInstrDesc &Desc, unsigned OpNo);
378 bool isSISrcFPOperand(const MCInstrDesc &Desc, unsigned OpNo);
381 bool isSISrcInlinableOperand(const MCInstrDesc &Desc, unsigned OpNo);
390 unsigned getRegOperandSize(const MCRegisterInfo *MRI, const MCInstrDesc &Desc,
422 inline unsigned getOperandSize(const MCInstrDesc &Desc, unsigned OpNo) { in getOperandSize()
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