| /external/capstone/arch/Mips/ |
| D | MipsDisassembler.c | 551 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs)); in DecodeAddiGroupBranch_4()
553 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt)); in DecodeAddiGroupBranch_4()
587 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs)); in DecodeDaddiGroupBranch_4()
589 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt)); in DecodeDaddiGroupBranch_4()
626 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs)); in DecodeBlezlGroupBranch_4()
628 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt)); in DecodeBlezlGroupBranch_4()
667 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs)); in DecodeBgtzlGroupBranch_4()
669 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt)); in DecodeBgtzlGroupBranch_4()
711 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rs)); in DecodeBgtzGroupBranch_4()
714 MCOperand_CreateReg0(MI, getReg(Decoder, Mips_GPR32RegClassID, Rt)); in DecodeBgtzGroupBranch_4()
[all …]
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| /external/capstone/arch/X86/ |
| D | X86Disassembler.c | 75 MCOperand_CreateReg0(mcInst, llvmRegnum); in translateRegister()
105 MCOperand_CreateReg0(mcInst, baseRegNo); in translateSrcIndex()
107 MCOperand_CreateReg0(mcInst, segmentRegnums[insn->segmentOverride]); in translateSrcIndex()
129 MCOperand_CreateReg0(mcInst, baseRegNo); in translateDstIndex()
279 MCOperand_CreateReg0(mcInst, X86_XMM0 + ((uint32_t)immediate >> 4)); in translateImmediate()
282 MCOperand_CreateReg0(mcInst, X86_YMM0 + ((uint32_t)immediate >> 4)); in translateImmediate()
285 MCOperand_CreateReg0(mcInst, X86_ZMM0 + ((uint32_t)immediate >> 4)); in translateImmediate()
305 MCOperand_CreateReg0(mcInst, segmentRegnums[insn->segmentOverride]); in translateImmediate()
334 MCOperand_CreateReg0(mcInst, X86_##x); break; in translateRMRegister()
378 MCOperand_CreateReg0(mcInst, X86_##x); break; in translateRMMemory()
[all …]
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| /external/capstone/arch/SystemZ/ |
| D | SystemZDisassembler.c | 44 MCOperand_CreateReg0(Inst, (unsigned)RegNo); in decodeRegisterClass()
192 MCOperand_CreateReg0(Inst, Base == 0 ? 0 : Regs[Base]); in decodeBDAddr12Operand()
205 MCOperand_CreateReg0(Inst, Base == 0 ? 0 : Regs[Base]); in decodeBDAddr20Operand()
218 MCOperand_CreateReg0(Inst, Base == 0 ? 0 : Regs[Base]); in decodeBDXAddr12Operand()
220 MCOperand_CreateReg0(Inst, Index == 0 ? 0 : Regs[Index]); in decodeBDXAddr12Operand()
233 MCOperand_CreateReg0(Inst, Base == 0 ? 0 : Regs[Base]); in decodeBDXAddr20Operand()
235 MCOperand_CreateReg0(Inst, Index == 0 ? 0 : Regs[Index]); in decodeBDXAddr20Operand()
248 MCOperand_CreateReg0(Inst, Base == 0 ? 0 : Regs[Base]); in decodeBDLAddr12Len8Operand()
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| /external/capstone/arch/PowerPC/ |
| D | PPCDisassembler.c | 157 MCOperand_CreateReg0(Inst, Regs[RegNo]); in decodeRegisterClass()
276 MCOperand_CreateReg0(Inst, GP0Regs[Base]); in decodeMemRIOperands()
288 MCOperand_CreateReg0(Inst, GP0Regs[Base]); in decodeMemRIOperands()
305 MCOperand_CreateReg0(Inst, GP0Regs[Base]); in decodeMemRIXOperands()
310 MCOperand_CreateReg0(Inst, GP0Regs[Base]); in decodeMemRIXOperands()
324 MCOperand_CreateReg0(Inst, CRRegs[7 - Zeros]); in decodeCRBitMOperand()
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| /external/capstone/arch/Sparc/ |
| D | SparcDisassembler.c | 96 MCOperand_CreateReg0(Inst, Reg); in DecodeIntRegsRegisterClass()
110 MCOperand_CreateReg0(Inst, Reg); in DecodeI64RegsRegisterClass()
124 MCOperand_CreateReg0(Inst, Reg); in DecodeFPRegsRegisterClass()
138 MCOperand_CreateReg0(Inst, Reg); in DecodeDFPRegsRegisterClass()
155 MCOperand_CreateReg0(Inst, Reg); in DecodeQFPRegsRegisterClass()
166 MCOperand_CreateReg0(Inst, FCCRegDecoderTable[RegNo]); in DecodeFCCRegsRegisterClass()
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| /external/capstone/arch/AArch64/ |
| D | AArch64Disassembler.c | 290 MCOperand_CreateReg0(Inst, Register); in DecodeFPR128RegisterClass()
324 MCOperand_CreateReg0(Inst, Register); in DecodeFPR64RegisterClass()
348 MCOperand_CreateReg0(Inst, Register); in DecodeFPR32RegisterClass()
372 MCOperand_CreateReg0(Inst, Register); in DecodeFPR16RegisterClass()
396 MCOperand_CreateReg0(Inst, Register); in DecodeFPR8RegisterClass()
420 MCOperand_CreateReg0(Inst, Register); in DecodeGPR64RegisterClass()
437 MCOperand_CreateReg0(Inst, Register); in DecodeGPR64spRegisterClass()
462 MCOperand_CreateReg0(Inst, Register); in DecodeGPR32RegisterClass()
479 MCOperand_CreateReg0(Inst, Register); in DecodeGPR32spRegisterClass()
503 MCOperand_CreateReg0(Inst, Register); in DecodeVectorRegisterClass()
[all …]
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| /external/capstone/arch/ARM/ |
| D | ARMDisassembler.c | 419 MCOperand_CreateReg0(Inst, 0); in DecodePredicateOperand()
421 MCOperand_CreateReg0(Inst, ARM_CPSR); in DecodePredicateOperand()
910 MCOperand_CreateReg0(Inst, Register); in DecodeGPRRegisterClass()
933 MCOperand_CreateReg0(Inst, ARM_APSR_NZCV); in DecodeGPRwithAPSRRegisterClass()
967 MCOperand_CreateReg0(Inst, RegisterPair); in DecodeGPRPairRegisterClass()
998 MCOperand_CreateReg0(Inst, Register); in DecodetcGPRRegisterClass()
1031 MCOperand_CreateReg0(Inst, Register); in DecodeSPRRegisterClass()
1054 MCOperand_CreateReg0(Inst, Register); in DecodeDPRRegisterClass()
1091 MCOperand_CreateReg0(Inst, Register); in DecodeQPRRegisterClass()
1112 MCOperand_CreateReg0(Inst, Register); in DecodeDPairRegisterClass()
[all …]
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| D | ARMInstPrinter.c | 683 MCOperand_CreateReg0(&NewMI, MCRegisterInfo_getMatchingSuperReg(MRI, Reg, ARM_gsub_0, in ARM_printInst()
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| /external/capstone/ |
| D | MCInst.h | 78 void MCOperand_CreateReg0(MCInst *inst, unsigned Reg);
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| D | MCInst.c | 150 void MCOperand_CreateReg0(MCInst *mcInst, unsigned Reg) in MCOperand_CreateReg0() function
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| /external/capstone/arch/XCore/ |
| D | XCoreDisassembler.c | 153 MCOperand_CreateReg0(Inst, Reg); in DecodeGRRegsRegisterClass()
166 MCOperand_CreateReg0(Inst, Reg); in DecodeRRegsRegisterClass()
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