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Searched refs:MDCNFG (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/cpu/pxa/
Dpxa2xx.c138 ~(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3), MDCNFG); in pxa2xx_dram_init()
159 tmp |= readl(MDCNFG); in pxa2xx_dram_init()
160 writelrb(tmp, MDCNFG); in pxa2xx_dram_init()
/external/u-boot/arch/arm/include/asm/arch-pxa/
Dpxa-regs.h2286 #define MDCNFG 0x48100000 /* SDRAM Configuration Register 0 */ macro
2443 #define MDCNFG 0x48000000 /* SDRAM Configuration Register 0 */ macro
/external/u-boot/include/
DSA-1100.h1824 #define MDCNFG /* DRAM CoNFiGuration reg. */ \ macro
1834 #define MDCNFG (io_p2v(_MDCNFG)) macro