Searched refs:MDREFR (Results 1 – 3 of 3) sorted by relevance
103 tmp = readl(MDREFR) & ~0xfff; in pxa2xx_dram_init()111 writelrb(tmp, MDREFR); in pxa2xx_dram_init()129 writelrb(CONFIG_SYS_MDREFR_VAL & ~MDREFR_SLFRSH, MDREFR); in pxa2xx_dram_init()130 writelrb(CONFIG_SYS_MDREFR_VAL | MDREFR_E1PIN, MDREFR); in pxa2xx_dram_init()173 tmp = readl(MDREFR); in pxa2xx_dram_init()175 writelrb(tmp, MDREFR); in pxa2xx_dram_init()281 writel(MDREFR_SLFRSH, MDREFR); in reset_cpu()
2287 #define MDREFR 0x48100004 /* SDRAM Refresh Control Register */ macro2450 #define MDREFR 0x48000004 /* SDRAM Refresh Control Register */ macro
2039 #define MDREFR \ macro2044 #define MDREFR (io_p2v(_MDREFR)) macro