Home
last modified time | relevance | path

Searched refs:MIPS64 (Results 1 – 25 of 92) sorted by relevance

1234

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Dconst-mult.ll3 ; RUN: llc -mtriple=mips64el-mti-linux-gnu < %s | FileCheck %s -check-prefix=MIPS64
13 ; MIPS64-LABEL: mul5_32:
14 ; MIPS64: # %bb.0: # %entry
15 ; MIPS64-NEXT: sll $1, $4, 2
16 ; MIPS64-NEXT: jr $ra
17 ; MIPS64-NEXT: addu $2, $1, $4
32 ; MIPS64-LABEL: mul27_32:
33 ; MIPS64: # %bb.0: # %entry
34 ; MIPS64-NEXT: sll $1, $4, 2
35 ; MIPS64-NEXT: addu $1, $1, $4
[all …]
Dxray-mips-attribute-instrumentation.ll3 …riple=mips64-unknown-linux-gnu < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-MIPS64 %s
4 …ple=mips64el-unknown-linux-gnu < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-MIPS64 %s
8 ; CHECK-MIPS64-LABEL: .Lxray_sled_0:
10 ; CHECK-MIPS64: b .Ltmp0
23 ; CHECK-MIPS64: nop
24 ; CHECK-MIPS64: nop
25 ; CHECK-MIPS64: nop
26 ; CHECK-MIPS64: nop
27 ; CHECK-MIPS64-LABEL: .Ltmp0:
32 ; CHECK-MIPS64-LABEL: .Lxray_sled_1:
[all …]
Dblez_bgez.ll5 ; RUN: llc -mtriple=mips64el-mti-linux-gnu < %s | FileCheck %s --check-prefix=MIPS64
26 ; MIPS64-LABEL: test_blez:
27 ; MIPS64: # %bb.0: # %entry
28 ; MIPS64-NEXT: sll $1, $4, 0
29 ; MIPS64-NEXT: blez $1, .LBB0_2
30 ; MIPS64-NEXT: nop
31 ; MIPS64-NEXT: # %bb.1: # %if.then
32 ; MIPS64-NEXT: daddiu $sp, $sp, -16
33 ; MIPS64-NEXT: .cfi_def_cfa_offset 16
34 ; MIPS64-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
[all …]
Docteon.ll2 ; RUN: llc -O1 < %s -march=mips64 -mcpu=mips64 | FileCheck %s -check-prefixes=ALL,MIPS64
10 ; MIPS64: daddu $[[T0:[0-9]+]], $4, $5
11 ; MIPS64: jr $ra
12 ; MIPS64: andi $2, $[[T0]], 255
23 ; MIPS64: dmult $4, $5
24 ; MIPS64: jr $ra
25 ; MIPS64: mflo $2
35 ; MIPS64: xor $[[T0:[0-9]+]], $4, $5
36 ; MIPS64: sltiu $[[T1:[0-9]+]], $[[T0]], 1
37 ; MIPS64: dsll $[[T2:[0-9]+]], $[[T1]], 32
[all …]
Dcttz-v.ll2 ; RUN: llc < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefix=MIPS64
21 ; MIPS64-DAG: sll $[[A0:[0-9]+]], $4, 0
22 ; MIPS64-DAG: addiu $[[R0:[0-9]+]], $[[A0]], -1
23 ; MIPS64-DAG: not $[[R1:[0-9]+]], $[[A0]]
24 ; MIPS64-DAG: and $[[R2:[0-9]+]], $[[R1]], $[[R0]]
25 ; MIPS64-DAG: clz $[[R3:[0-9]+]], $[[R2]]
26 ; MIPS64-DAG: addiu $[[R4:[0-9]+]], $zero, 32
27 ; MIPS64-DAG: subu $[[R5:[0-9]+]], $[[R4]], $[[R3]]
28 ; MIPS64-DAG: dsrl $[[R6:[0-9]+]], $4, 32
29 ; MIPS64-DAG: sll $[[R7:[0-9]+]], $[[R6]], 0
[all …]
Dload-store-left-right.ll7 …4 -target-abi=n64 -relocation-model=pic < %s | FileCheck -check-prefixes=ALL,MIPS64,MIPS64-EL %s
8 …4 -target-abi=n64 -relocation-model=pic < %s | FileCheck -check-prefixes=ALL,MIPS64,MIPS64-EB %s
9 …64 -target-abi=n64 -relocation-model=pic < %s | FileCheck -check-prefixes=ALL,MIPS64,MIPS64-EL %s
10 …64 -target-abi=n64 -relocation-model=pic < %s | FileCheck -check-prefixes=ALL,MIPS64,MIPS64-EB %s
11 …r2 -target-abi=n64 -relocation-model=pic < %s | FileCheck -check-prefixes=ALL,MIPS64,MIPS64R2-EL %s
12 …r2 -target-abi=n64 -relocation-model=pic < %s | FileCheck -check-prefixes=ALL,MIPS64,MIPS64R2-EB %s
37 ; MIPS64-EL: lwl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
38 ; MIPS64-EL: lwr $[[R0]], 0($[[R1]])
43 ; MIPS64-EB: lwl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
44 ; MIPS64-EB: lwr $[[R0]], 3($[[R1]])
[all …]
Dctlz-v.ll2 ; RUN: llc < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefix=MIPS64
11 ; MIPS64-DAG: dsrl $[[A0:[0-9]+]], $4, 32
12 ; MIPS64-DAG: sll $[[A1:[0-9]+]], $[[A0]], 0
13 ; MIPS64-DAG: clz $[[R0:[0-9]+]], $[[A1]]
14 ; MIPS64-DAG: dsll $[[R1:[0-9]+]], $[[R0]], 32
15 ; MIPS64-DAG: sll $[[A2:[0-9]+]], $4, 0
16 ; MIPS64-DAG: clz $[[R2:[0-9]+]], $[[A2]]
17 ; MIPS64-DAG: dext $[[R3:[0-9]+]], $[[R2]], 0, 32
18 ; MIPS64-DAG: or $2, $[[R3]], $[[R1]]
Datomic64.ll5 ; RUN: FileCheck %s -check-prefix=MIPS64
43 ; MIPS64-LABEL: AtomicLoadAdd:
44 ; MIPS64: # %bb.0: # %entry
45 ; MIPS64-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicLoadAdd)))
46 ; MIPS64-NEXT: daddu $1, $1, $25
47 ; MIPS64-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicLoadAdd)))
48 ; MIPS64-NEXT: ld $1, %got_disp(x)($1)
49 ; MIPS64-NEXT: .LBB0_1: # %entry
50 ; MIPS64-NEXT: # =>This Inner Loop Header: Depth=1
51 ; MIPS64-NEXT: lld $2, 0($1)
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/longbranch/
Dbranch-limits-int-mips64.mir2 …efore mips-delay-slot-filler -stop-after mips-branch-expansion | FileCheck %s --check-prefix=MIPS64
116 ; MIPS64-LABEL: name: expand_BEQ64
117 ; MIPS64: bb.0 (%ir-block.0):
118 ; MIPS64: successors: %bb.2(0x40000000), %bb.1(0x40000000)
119 ; MIPS64: BNE64 $a0_64, $zero_64, %bb.2, implicit-def $at {
120 ; MIPS64: NOP
121 ; MIPS64: }
122 ; MIPS64: bb.1 (%ir-block.0):
123 ; MIPS64: successors: %bb.3(0x80000000)
124 ; MIPS64: J %bb.3, implicit-def $at {
[all …]
Dbranch-limits-int-mips64r6.mir2 …efore mips-delay-slot-filler -stop-after mips-branch-expansion | FileCheck %s --check-prefix=MIPS64
188 ; MIPS64-LABEL: name: expand_BNEZC64
189 ; MIPS64: bb.0 (%ir-block.0):
190 ; MIPS64: successors: %bb.1(0x40000000), %bb.2(0x40000000)
191 ; MIPS64: BNEZC64 killed renamable $a0_64, %bb.2, implicit-def $at
192 ; MIPS64: bb.1.iftrue:
193 ; MIPS64: INLINEASM &".space 831068", 1
194 ; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
195 ; MIPS64: $v0_64 = DADDiu $zero_64, 1
196 ; MIPS64: }
[all …]
/external/llvm/test/CodeGen/Mips/
Docteon.ll2 ; RUN: llc -O1 < %s -march=mips64 -mcpu=mips64 | FileCheck %s -check-prefixes=ALL,MIPS64
9 ; MIPS64: daddu $[[T0:[0-9]+]], $4, $5
10 ; MIPS64: jr $ra
11 ; MIPS64: andi $2, $[[T0]], 255
22 ; MIPS64: dmult $4, $5
23 ; MIPS64: jr $ra
24 ; MIPS64: mflo $2
34 ; MIPS64: xor $[[T0:[0-9]+]], $4, $5
35 ; MIPS64: sltiu $[[T1:[0-9]+]], $[[T0]], 1
36 ; MIPS64: dsll $[[T2:[0-9]+]], $[[T1]], 32
[all …]
Dload-store-left-right.ll7 …4 -target-abi=n64 -relocation-model=pic < %s | FileCheck -check-prefixes=ALL,MIPS64,MIPS64-EL %s
8 …4 -target-abi=n64 -relocation-model=pic < %s | FileCheck -check-prefixes=ALL,MIPS64,MIPS64-EB %s
9 …64 -target-abi=n64 -relocation-model=pic < %s | FileCheck -check-prefixes=ALL,MIPS64,MIPS64-EL %s
10 …64 -target-abi=n64 -relocation-model=pic < %s | FileCheck -check-prefixes=ALL,MIPS64,MIPS64-EB %s
11 …64r2 -target-abi=n64 -relocation-model=pic < %s | FileCheck -check-prefixes=ALL,MIPS64,MIPS64-EL %s
12 …64r2 -target-abi=n64 -relocation-model=pic < %s | FileCheck -check-prefixes=ALL,MIPS64,MIPS64-EB %s
37 ; MIPS64-EL: lwl $[[R0:[0-9]+]], 3($[[R1:[0-9]+]])
38 ; MIPS64-EL: lwr $[[R0]], 0($[[R1]])
40 ; MIPS64-EB: lwl $[[R0:[0-9]+]], 0($[[R1:[0-9]+]])
41 ; MIPS64-EB: lwr $[[R0]], 3($[[R1]])
[all …]
Dcttz-v.ll2 ; RUN: llc < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefix=MIPS64
21 ; MIPS64-DAG: sll $[[A0:[0-9]+]], $4, 0
22 ; MIPS64-DAG: addiu $[[R0:[0-9]+]], $[[A0]], -1
23 ; MIPS64-DAG: not $[[R1:[0-9]+]], $[[A0]]
24 ; MIPS64-DAG: and $[[R2:[0-9]+]], $[[R1]], $[[R0]]
25 ; MIPS64-DAG: clz $[[R3:[0-9]+]], $[[R2]]
26 ; MIPS64-DAG: addiu $[[R4:[0-9]+]], $zero, 32
27 ; MIPS64-DAG: subu $2, $[[R4]], $[[R3]]
28 ; MIPS64-DAG: sll $[[A1:[0-9]+]], $5, 0
29 ; MIPS64-DAG: addiu $[[R5:[0-9]+]], $[[A1]], -1
[all …]
Dbswap.ll2 ; RUN: llc < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefix=MIPS64
11 ; MIPS64-LABEL: bswap32:
12 ; MIPS64: wsbh $[[R0:[0-9]+]]
13 ; MIPS64: rotr ${{[0-9]+}}, $[[R0]], 16
40 ; MIPS64-LABEL: bswap64:
41 ; MIPS64: dsbh $[[R0:[0-9]+]]
42 ; MIPS64: dshd ${{[0-9]+}}, $[[R0]]
84 ; MIPS64-LABEL: bswapv4i32:
85 ; MIPS64-DAG: wsbh $[[R0:[0-9]+]]
86 ; MIPS64-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Dmips-coprocessor-encodings.s2 # RUN:| FileCheck --check-prefix=MIPS64 %s
4 # MIPS64: dmtc0 $12, $16, 2 # encoding: [0x40,0xac,0x80,0x02]
5 # MIPS64: dmtc0 $12, $16, 0 # encoding: [0x40,0xac,0x80,0x00]
6 # MIPS64: mtc0 $12, $16, 2 # encoding: [0x40,0x8c,0x80,0x02]
7 # MIPS64: mtc0 $12, $16, 0 # encoding: [0x40,0x8c,0x80,0x00]
8 # MIPS64: dmfc0 $12, $16, 2 # encoding: [0x40,0x2c,0x80,0x02]
9 # MIPS64: dmfc0 $12, $16, 0 # encoding: [0x40,0x2c,0x80,0x00]
10 # MIPS64: mfc0 $12, $16, 2 # encoding: [0x40,0x0c,0x80,0x02]
11 # MIPS64: mfc0 $12, $16, 0 # encoding: [0x40,0x0c,0x80,0x00]
22 # MIPS64: dmtc2 $12, $16, 2 # encoding: [0x48,0xac,0x80,0x02]
[all …]
/external/llvm/test/MC/Mips/
Dmips-coprocessor-encodings.s2 # RUN:| FileCheck --check-prefix=MIPS64 %s
4 # MIPS64: dmtc0 $12, $16, 2 # encoding: [0x40,0xac,0x80,0x02]
5 # MIPS64: dmtc0 $12, $16, 0 # encoding: [0x40,0xac,0x80,0x00]
6 # MIPS64: mtc0 $12, $16, 2 # encoding: [0x40,0x8c,0x80,0x02]
7 # MIPS64: mtc0 $12, $16, 0 # encoding: [0x40,0x8c,0x80,0x00]
8 # MIPS64: dmfc0 $12, $16, 2 # encoding: [0x40,0x2c,0x80,0x02]
9 # MIPS64: dmfc0 $12, $16, 0 # encoding: [0x40,0x2c,0x80,0x00]
10 # MIPS64: mfc0 $12, $16, 2 # encoding: [0x40,0x0c,0x80,0x02]
11 # MIPS64: mfc0 $12, $16, 0 # encoding: [0x40,0x0c,0x80,0x00]
22 # MIPS64: dmtc2 $12, $16, 2 # encoding: [0x48,0xac,0x80,0x02]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/
Dload.ll7 …-mtriple=mips64-mti-linux-gnu -mcpu=mips64 < %s -asm-show-inst | FileCheck %s --check-prefix=MIPS64
95 ; MIPS64-LABEL: f1:
96 ; MIPS64: # %bb.0: # %entry
97 ; MIPS64-NEXT: lui $1, %highest(a) # <MCInst #{{[0-9]+}} LUi64
98 ; MIPS64-NEXT: # <MCOperand Reg:30>
99 ; MIPS64-NEXT: # <MCOperand Expr:(%highest(a))>>
100 ; MIPS64-NEXT: daddiu $1, $1, %higher(a) # <MCInst #{{[0-9]+}} DADDiu
101 ; MIPS64-NEXT: # <MCOperand Reg:30>
102 ; MIPS64-NEXT: # <MCOperand Reg:30>
103 ; MIPS64-NEXT: # <MCOperand Expr:(%higher(a))>>
[all …]
Dand.ll15 ; RUN: -check-prefix=MIPS64
17 ; RUN: -check-prefix=MIPS64
19 ; RUN: -check-prefix=MIPS64
49 ; MIPS64-LABEL: and_i1:
50 ; MIPS64: # %bb.0: # %entry
51 ; MIPS64-NEXT: and $1, $4, $5
52 ; MIPS64-NEXT: jr $ra
53 ; MIPS64-NEXT: sll $2, $1, 0
98 ; MIPS64-LABEL: and_i8:
99 ; MIPS64: # %bb.0: # %entry
[all …]
Dxor.ll13 ; RUN: -check-prefix=MIPS64
15 ; RUN: -check-prefix=MIPS64
17 ; RUN: -check-prefix=MIPS64
47 ; MIPS64-LABEL: xor_i1:
48 ; MIPS64: # %bb.0: # %entry
49 ; MIPS64-NEXT: xor $1, $4, $5
50 ; MIPS64-NEXT: jr $ra
51 ; MIPS64-NEXT: sll $2, $1, 0
96 ; MIPS64-LABEL: xor_i8:
97 ; MIPS64: # %bb.0: # %entry
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/indirect-jump-hazard/
Dlong-branch.ll16 ; RUN: < %s | FileCheck %s -check-prefix=MIPS64
77 ; MIPS64-LABEL: test1:
78 ; MIPS64: # %bb.0: # %entry
79 ; MIPS64-NEXT: lui $1, %hi(%neg(%gp_rel(test1)))
80 ; MIPS64-NEXT: bnez $4, .LBB0_3
81 ; MIPS64-NEXT: daddu $2, $1, $25
82 ; MIPS64-NEXT: # %bb.1: # %entry
83 ; MIPS64-NEXT: daddiu $sp, $sp, -16
84 ; MIPS64-NEXT: sd $ra, 0($sp)
85 ; MIPS64-NEXT: daddiu $1, $zero, %hi(.LBB0_4-.LBB0_2)
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/msa/
Dshift_constant_pool.ll4 …march=mips64 -mattr=+msa,+fp64 -relocation-model=pic < %s | FileCheck -check-prefixes=ALL,MIPS64 %s
6 …rch=mips64el -mattr=+msa,+fp64 -relocation-model=pic < %s | FileCheck -check-prefixes=ALL,MIPS64 %s
21 ; MIPS64: [[LABEL:\.LCPI[0-9]+_[0-9]+]]:
30 ; MIPS64: ld $[[R2:[0-9]+]], %got_page([[LABEL]])($[[R1:[0-9]+]])
31 ; MIPS64: daddiu $[[R2]], $[[R2]], %got_ofst([[LABEL]])
32 ; MIPS64: ld $[[R3:[0-9]+]], %got_disp(llvm_mips_bclr_w_test_const_vec_res)($[[R1]])
49 ; MIPS64: [[LABEL:\.LCPI[0-9]+_[0-9]+]]:
58 ; MIPS64: ld $[[R2:[0-9]+]], %got_page([[LABEL]])($[[R1:[0-9]+]])
59 ; MIPS64: daddiu $[[R2]], $[[R2]], %got_ofst([[LABEL]])
60 ; MIPS64: ld $[[R3:[0-9]+]], %got_disp(llvm_mips_bneg_w_test_const_vec_res)($[[R1]])
[all …]
/external/llvm/test/tools/llvm-readobj/
Dprogram-headers.test8 RUN: | FileCheck %s -check-prefix ELF-MIPS64
124 ELF-MIPS64: Format: ELF64-mips
125 ELF-MIPS64-NEXT: Arch: mips64
126 ELF-MIPS64-NEXT: AddressSize: 64bit
127 ELF-MIPS64-NEXT: LoadName:
128 ELF-MIPS64-NEXT: ProgramHeaders [
129 ELF-MIPS64-NEXT: ProgramHeader {
130 ELF-MIPS64-NEXT: Type: PT_LOAD (0x1)
131 ELF-MIPS64-NEXT: Offset: 0x0
132 ELF-MIPS64-NEXT: VirtualAddress: 0x120000000
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/cconv/
Dvector.ll3 …del=pic -mcpu=mips64 -disable-mips-delay-filler | FileCheck %s --check-prefixes=ALL,MIPS64,MIPS64EB
7 …del=pic -mcpu=mips64 -disable-mips-delay-filler | FileCheck %s --check-prefixes=ALL,MIPS64,MIPS64EL
772 ; MIPS64-LABEL: i8_4:
773 ; MIPS64: # %bb.0:
774 ; MIPS64-NEXT: sll $1, $5, 0
775 ; MIPS64-NEXT: srl $2, $1, 24
776 ; MIPS64-NEXT: sll $3, $4, 0
777 ; MIPS64-NEXT: srl $4, $3, 24
778 ; MIPS64-NEXT: addu $2, $4, $2
779 ; MIPS64-NEXT: sll $2, $2, 8
[all …]
/external/llvm/test/CodeGen/Mips/cstmaterialization/
Dstack.ll3 ; RUN: FileCheck %s -check-prefix=CHECK-MIPS64
27 ; CHECK-MIPS64: lui $[[R0:[0-9]+]], 1
28 ; CHECK-MIPS64: daddiu $[[R0]], $[[R0]], 32
29 ; CHECK-MIPS64: dsubu $sp, $sp, $[[R0]]
35 ; CHECK-MIPS64: lui
36 ; CHECK-MIPS64: lui
37 ; CHECK-MIPS64: lui
38 ; CHECK-MIPS64: lui
40 ; CHECK-MIPS64: lui $[[R1:[0-9]+]], 16
41 ; CHECK-MIPS64: daddiu $[[R1]], $[[R1]], 32
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/cstmaterialization/
Dstack.ll3 ; RUN: FileCheck %s -check-prefix=CHECK-MIPS64
27 ; CHECK-MIPS64: lui $[[R0:[0-9]+]], 1
28 ; CHECK-MIPS64: daddiu $[[R0]], $[[R0]], 32
29 ; CHECK-MIPS64: dsubu $sp, $sp, $[[R0]]
35 ; CHECK-MIPS64: lui
36 ; CHECK-MIPS64: lui
37 ; CHECK-MIPS64: lui
38 ; CHECK-MIPS64: lui
40 ; CHECK-MIPS64: lui $[[R1:[0-9]+]], 16
41 ; CHECK-MIPS64: daddiu $[[R1]], $[[R1]], 32
[all …]

1234