Searched refs:MI_PREDICATE_SRC1 (Results 1 – 6 of 6) sorted by relevance
/external/mesa3d/src/mesa/drivers/dri/i965/ |
D | brw_conditional_render.c | 70 brw_load_register_imm64(brw, MI_PREDICATE_SRC1, 0ull); in set_predicate_for_overflow_query() 91 brw_load_register_mem64(brw, MI_PREDICATE_SRC1, query->bo, 8 /* offset */); in set_predicate_for_occlusion_query()
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D | brw_compute.c | 56 OUT_BATCH(MI_PREDICATE_SRC1 + 0); in prepare_indirect_gpgpu_walker() 58 OUT_BATCH(MI_PREDICATE_SRC1 + 4); in prepare_indirect_gpgpu_walker()
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D | hsw_queryobj.c | 389 brw_load_register_imm64(brw, MI_PREDICATE_SRC1, 0ull); in set_predicate()
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D | brw_defines.h | 1589 #define MI_PREDICATE_SRC1 0x2408 macro
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D | brw_draw.c | 987 brw_load_register_imm64(brw, MI_PREDICATE_SRC1, prims[i].draw_id); in brw_draw_prims()
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/external/mesa3d/src/intel/vulkan/ |
D | genX_cmd_buffer.c | 407 #define MI_PREDICATE_SRC1 0x2408 macro 450 emit_lri(&cmd_buffer->batch, MI_PREDICATE_SRC1 , 0); in genX() 451 emit_lri(&cmd_buffer->batch, MI_PREDICATE_SRC1 + 4, 0); in genX() 2744 emit_lri(batch, MI_PREDICATE_SRC1 + 0, 0); in genX() 2745 emit_lri(batch, MI_PREDICATE_SRC1 + 4, 0); in genX()
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