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Searched refs:MMC_TIMING_UHS_DDR50 (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/board/xilinx/zynqmp/
Dtap_delays.c59 #define MMC_TIMING_UHS_DDR50 4 macro
150 if (timing == MMC_TIMING_UHS_DDR50) in arasan_zynqmp_tap_ddr50()
158 if (timing == MMC_TIMING_UHS_DDR50) in arasan_zynqmp_tap_ddr50()
170 if (timing == MMC_TIMING_UHS_DDR50) in arasan_zynqmp_tap_ddr50()
178 if (timing == MMC_TIMING_UHS_DDR50) in arasan_zynqmp_tap_ddr50()
220 case MMC_TIMING_UHS_DDR50: in arasan_zynqmp_set_tapdelay()
/external/u-boot/drivers/mmc/
Dxenon_sdhci.c103 #define MMC_TIMING_UHS_DDR50 7 macro
234 (priv->timing == MMC_TIMING_UHS_DDR50) || in xenon_mmc_phy_set()
344 priv->timing = MMC_TIMING_UHS_DDR50; in xenon_sdhci_set_ios_post()