Searched refs:MMDC1 (Results 1 – 5 of 5) sorted by relevance
| /external/u-boot/arch/arm/mach-imx/mx6/ |
| D | ddr.c | 933 #define MMDC1(entry, value) do { \ macro
1393 MMDC1(mpwldectrl0, calib->p1_mpwldectrl0); in mx6_ddr3_cfg()
1394 MMDC1(mpwldectrl1, calib->p1_mpwldectrl1); in mx6_ddr3_cfg()
1395 MMDC1(mpdgctrl0, calib->p1_mpdgctrl0); in mx6_ddr3_cfg()
1396 MMDC1(mpdgctrl1, calib->p1_mpdgctrl1); in mx6_ddr3_cfg()
1397 MMDC1(mprddlctl, calib->p1_mprddlctl); in mx6_ddr3_cfg()
1398 MMDC1(mpwrdlctl, calib->p1_mpwrdlctl); in mx6_ddr3_cfg()
1410 MMDC1(mprddqby0dl, 0x33333333); in mx6_ddr3_cfg()
1411 MMDC1(mprddqby1dl, 0x33333333); in mx6_ddr3_cfg()
1412 MMDC1(mprddqby2dl, 0x33333333); in mx6_ddr3_cfg()
[all …]
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| /external/u-boot/arch/arm/include/asm/arch-s32v234/ |
| D | mmdc.h | 10 #define MMDC1 1 macro
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| /external/u-boot/board/freescale/s32v234evb/ |
| D | lpddr2.c | 117 case MMDC1: in config_mmdc()
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| /external/u-boot/board/freescale/mx6qarm2/ |
| D | imximage_mx6dl.cfg | 130 * MMDC channels: Both MMDC0, MMDC1
195 * b. The calibration code that runs for both MMDC0 & MMDC1 should be used.
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| /external/u-boot/arch/arm/dts/ |
| D | imx6qdl.dtsi | 1090 mmdc1: mmdc@021b4000 { /* MMDC1 */
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