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Searched refs:MMDC_MPWRDLCTL_MODULE0_VALUE (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-s32v234/
Dlpddr2.h56 #define MMDC_MPWRDLCTL_MODULE0_VALUE 0x38383737 /* Write delay line offsets */ macro
/external/u-boot/board/freescale/s32v234evb/
Dlpddr2.c110 writel(MMDC_MPWRDLCTL_MODULE0_VALUE, in config_mmdc()