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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrMMX.td1 //===-- X86InstrMMX.td - Describe the MMX Instruction Set --*- tablegen -*-===//
10 // This file describes the X86 MMX instruction set, defining the instructions,
14 // All instructions that use MMX should be in this file, even if they also use
20 // MMX Multiclasses
33 // MMXI_binop_rm_int - Simple MMX binary operator based on intrinsic.
76 /// Unary MMX instructions requiring SSSE3.
91 /// Binary MMX instructions requiring SSSE3.
112 /// PALIGN MMX instructions (require SSSE3).
153 // MMX EMMS Instruction
160 // MMX Scalar Instructions
[all …]
DX86Instr3DNow.td10 // This file describes the 3DNow! instruction set, which extends MMX to support
57 defm PAVGUSB : I3DNow_binop_rm_int<0xBF, "pavgusb", SchedWriteVecALU.MMX, 1>;
75 defm PMULHRW : I3DNow_binop_rm_int<0xB7, "pmulhrw", SchedWriteVecIMul.MMX, 1>;
111 defm PSWAPD : I3DNow_conv_rm_int<0xBB, "pswapd", SchedWriteShuffle.MMX, "a">;
/external/llvm/test/CodeGen/X86/
Dfp128-select.ll2 ; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx | FileCheck %s --check-prefix=MMX
3 ; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx | FileCheck %s --check-prefix=MMX
8 ; MMX-LABEL: test_select:
9 ; MMX: # BB#0:
10 ; MMX-NEXT: testb %dl, %dl
11 ; MMX-NEXT: jne .LBB0_1
12 ; MMX-NEXT: # BB#2:
13 ; MMX-NEXT: movaps {{.*}}(%rip), %xmm0
14 ; MMX-NEXT: movaps %xmm0, (%rsi)
15 ; MMX-NEXT: retq
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dfp128-select.ll3 ; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=MMX
5 ; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=MMX
12 ; MMX-LABEL: test_select:
13 ; MMX: # %bb.0:
14 ; MMX-NEXT: testl %edx, %edx
15 ; MMX-NEXT: jne .LBB0_1
16 ; MMX-NEXT: # %bb.2:
17 ; MMX-NEXT: movaps {{.*}}(%rip), %xmm0
18 ; MMX-NEXT: movaps %xmm0, (%rsi)
19 ; MMX-NEXT: retq
[all …]
Dmmx-build-vector.ll2 …%s -mtriple=i686-unknown-unknown -mattr=+mmx | FileCheck %s --check-prefixes=X86,X86-MMX
68 ; X86-MMX-LABEL: build_v2i32_u1:
69 ; X86-MMX: # %bb.0:
70 ; X86-MMX-NEXT: movl {{[0-9]+}}(%esp), %eax
71 ; X86-MMX-NEXT: movd {{[0-9]+}}(%esp), %mm0
72 ; X86-MMX-NEXT: punpckldq %mm0, %mm0 # mm0 = mm0[0,0]
73 ; X86-MMX-NEXT: paddd %mm0, %mm0
74 ; X86-MMX-NEXT: movq %mm0, (%eax)
75 ; X86-MMX-NEXT: retl
129 ; X86-MMX-LABEL: build_v2i32_00:
[all …]
/external/fec/
Dviterbi39.c22 case MMX: in create_viterbi39()
44 case MMX: in set_viterbi39_polynomial()
69 case MMX: in init_viterbi39()
95 case MMX: in chainback_viterbi39()
118 case MMX: in delete_viterbi39()
145 case MMX: in update_viterbi39_blk()
Dviterbi29.c22 case MMX: in create_viterbi29()
44 case MMX: in set_viterbi29_polynomial()
68 case MMX: in init_viterbi29()
94 case MMX: in chainback_viterbi29()
117 case MMX: in delete_viterbi29()
144 case MMX: in update_viterbi29_blk()
Dviterbi27.c22 case MMX: in create_viterbi27()
44 case MMX: in set_viterbi27_polynomial()
68 case MMX: in init_viterbi27()
94 case MMX: in chainback_viterbi27()
117 case MMX: in delete_viterbi27()
149 case MMX: in update_viterbi27_blk()
Dviterbi615.c23 case MMX: in create_viterbi615()
46 case MMX: in set_viterbi615_polynomial()
70 case MMX: in init_viterbi615()
96 case MMX: in chainback_viterbi615()
119 case MMX: in delete_viterbi615()
146 case MMX: in update_viterbi615_blk()
Ddotprod.c37 case MMX: in initdp()
58 case MMX: in freedp()
80 case MMX: in dotprod()
Dencode_rs_8.c12 static enum {UNKNOWN=0,MMX,SSE,SSE2,ALTIVEC,PORT} cpu_mode; enumerator
33 cpu_mode = MMX; in encode_rs_8()
58 case MMX: in encode_rs_8()
Ddotprod_mmx_assist.s1 # SIMD MMX dot product
30 # MMX dot product loop unrolled 4 times, crunching 16 terms per loop
58 # MMX dot product loop, not unrolled, crunching 4 terms per loop
Dmmxbfly27.s8 # MMX (64-bit SIMD) version
9 # requires Pentium-MMX, Pentium-II or better
Dmmxbfly29.s18 # MMX (64-bit SIMD) version
19 # requires Pentium-MMX, Pentium-II or better
DREADME41 available: MMX, SSE and SSE2 on the IA-32 (Intel) architecture, and
65 The MMX (MultiMedia eXtensions) instruction set was introduced on
70 later AMD CPUs. SSE support implies MMX support, while SSE2 support
71 implies both SSE and MMX support.
107 Changed SIMD Viterbi decoder to detect SSE2/SSE/MMX at runtime rather than build time
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrMMX.td1 //====- X86InstrMMX.td - Describe the MMX Instruction Set --*- tablegen -*-===//
10 // This file describes the X86 MMX instruction set, defining the instructions,
14 // All instructions that use MMX should be in this file, even if they also use
20 // MMX Multiclasses
24 // MMXI_binop_rm_int - Simple MMX binary operator based on intrinsic.
60 /// Unary MMX instructions requiring SSSE3.
73 /// Binary MMX instructions requiring SSSE3.
91 /// PALIGN MMX instructions (require SSSE3).
124 // MMX EMMS Instruction
131 // MMX Scalar Instructions
[all …]
DREADME-MMX.txt2 // Random ideas for the X86 backend: MMX-specific stuff.
63 is we are not smart about materializing constants in MMX registers. With -m64
/external/libaom/libaom/third_party/libyuv/source/
Drow_x86.asm54 ; TODO(fbarchard): Remove MMX. Add SSSE3 pshufb version.
55 INIT_MMX MMX
100 INIT_MMX MMX
138 INIT_MMX MMX
/external/swiftshader/src/Reactor/
DCPUID.hpp49 static bool MMX; member in rr::CPUID
79 return MMX && enableMMX; in supportsMMX()
/external/swiftshader/src/System/
DCPUID.hpp54 static bool MMX; member in sw::CPUID
88 return MMX && enableMMX; in supportsMMX()
/external/swiftshader/src/Common/
DCPUID.hpp54 static bool MMX; member in sw::CPUID
88 return MMX && enableMMX; in supportsMMX()
/external/llvm/lib/Target/X86/
DX86InstrMMX.td1 //===-- X86InstrMMX.td - Describe the MMX Instruction Set --*- tablegen -*-===//
10 // This file describes the X86 MMX instruction set, defining the instructions,
14 // All instructions that use MMX should be in this file, even if they also use
20 // MMX Multiclasses
94 // MMXI_binop_rm_int - Simple MMX binary operator based on intrinsic.
135 /// Unary MMX instructions requiring SSSE3.
150 /// Binary MMX instructions requiring SSSE3.
170 /// PALIGN MMX instructions (require SSSE3).
210 // MMX EMMS Instruction
217 // MMX Scalar Instructions
[all …]
DREADME-MMX.txt2 // Random ideas for the X86 backend: MMX-specific stuff.
63 is we are not smart about materializing constants in MMX registers. With -m64
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dmmx-punpckhdq.ll2 ; There are no MMX operations in bork; promoted to XMM.
17 ; pork uses MMX.
D2008-09-05-sinttofp-2xi32.ll6 ; there are no MMX instructions here; we use XMM.
20 ; This is how to get MMX instructions.

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