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Searched refs:MO1 (Results 1 – 25 of 41) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/Target/ARM/InstPrinter/
DARMInstPrinter.cpp61 const MCOperand &MO1 = MI->getOperand(1); in printInst() local
70 << ", " << getRegisterName(MO1.getReg()); in printInst()
81 const MCOperand &MO1 = MI->getOperand(1); in printInst() local
89 << ", " << getRegisterName(MO1.getReg()); in printInst()
226 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2LdrLabelOperand() local
227 if (MO1.isExpr()) in printT2LdrLabelOperand()
228 O << *MO1.getExpr(); in printT2LdrLabelOperand()
229 else if (MO1.isImm()) in printT2LdrLabelOperand()
230 O << "[pc, #" << MO1.getImm() << "]"; in printT2LdrLabelOperand()
242 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegRegOperand() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/InstPrinter/
DARMInstPrinter.cpp89 const MCOperand &MO1 = MI->getOperand(1); in printInst() local
100 printRegName(O, MO1.getReg()); in printInst()
112 const MCOperand &MO1 = MI->getOperand(1); in printInst() local
122 printRegName(O, MO1.getReg()); in printInst()
327 const MCOperand &MO1 = MI->getOperand(OpNum); in printThumbLdrLabelOperand() local
328 if (MO1.isExpr()) { in printThumbLdrLabelOperand()
329 MO1.getExpr()->print(O, &MAI); in printThumbLdrLabelOperand()
335 int32_t OffImm = (int32_t)MO1.getImm(); in printThumbLdrLabelOperand()
357 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegRegOperand() local
361 printRegName(O, MO1.getReg()); in printSORegRegOperand()
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/external/llvm/lib/Target/ARM/InstPrinter/
DARMInstPrinter.cpp81 const MCOperand &MO1 = MI->getOperand(1); in printInst() local
92 printRegName(O, MO1.getReg()); in printInst()
104 const MCOperand &MO1 = MI->getOperand(1); in printInst() local
114 printRegName(O, MO1.getReg()); in printInst()
315 const MCOperand &MO1 = MI->getOperand(OpNum); in printThumbLdrLabelOperand() local
316 if (MO1.isExpr()) { in printThumbLdrLabelOperand()
317 MO1.getExpr()->print(O, &MAI); in printThumbLdrLabelOperand()
323 int32_t OffImm = (int32_t)MO1.getImm(); in printThumbLdrLabelOperand()
345 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegRegOperand() local
349 printRegName(O, MO1.getReg()); in printSORegRegOperand()
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/external/llvm/lib/Target/X86/
DX86OptimizeLEAs.cpp55 static inline bool isIdenticalOp(const MachineOperand &MO1,
60 static bool isSimilarDispOp(const MachineOperand &MO1,
181 static inline bool isIdenticalOp(const MachineOperand &MO1, in isIdenticalOp() argument
183 return MO1.isIdenticalTo(MO2) && in isIdenticalOp()
184 (!MO1.isReg() || in isIdenticalOp()
185 !TargetRegisterInfo::isPhysicalRegister(MO1.getReg())); in isIdenticalOp()
195 static bool isSimilarDispOp(const MachineOperand &MO1, in isSimilarDispOp() argument
197 assert(isValidDispOp(MO1) && isValidDispOp(MO2) && in isSimilarDispOp()
199 return (MO1.isImm() && MO2.isImm()) || in isSimilarDispOp()
200 (MO1.isCPI() && MO2.isCPI() && MO1.getIndex() == MO2.getIndex()) || in isSimilarDispOp()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86OptimizeLEAs.cpp65 static inline bool isIdenticalOp(const MachineOperand &MO1,
70 static bool isSimilarDispOp(const MachineOperand &MO1,
199 static inline bool isIdenticalOp(const MachineOperand &MO1, in isIdenticalOp() argument
201 return MO1.isIdenticalTo(MO2) && in isIdenticalOp()
202 (!MO1.isReg() || in isIdenticalOp()
203 !TargetRegisterInfo::isPhysicalRegister(MO1.getReg())); in isIdenticalOp()
213 static bool isSimilarDispOp(const MachineOperand &MO1, in isSimilarDispOp() argument
215 assert(isValidDispOp(MO1) && isValidDispOp(MO2) && in isSimilarDispOp()
217 return (MO1.isImm() && MO2.isImm()) || in isSimilarDispOp()
218 (MO1.isCPI() && MO2.isCPI() && MO1.getIndex() == MO2.getIndex()) || in isSimilarDispOp()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp434 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in EncodeAddrModeOpValues() local
438 int32_t SImm = MO1.getImm(); in EncodeAddrModeOpValues()
690 const MCOperand &MO1 = MI.getOperand(OpIdx); in getThumbAddrModeRegRegOpValue() local
692 unsigned Rn = getARMRegisterNumbering(MO1.getReg()); in getThumbAddrModeRegRegOpValue()
823 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in getT2AddrModeImm0_1020s4OpValue() local
825 unsigned Imm8 = MO1.getImm(); in getT2AddrModeImm0_1020s4OpValue()
894 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getLdStSORegOpValue() local
897 unsigned Rm = getARMRegisterNumbering(MO1.getReg()); in getLdStSORegOpValue()
940 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getAddrMode2OffsetOpValue() local
941 unsigned Imm = MO1.getImm(); in getAddrMode2OffsetOpValue()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86CodeEmitter.cpp826 const MachineOperand &MO1 = MI.getOperand(CurOp++); in emitInstruction() local
828 if (MO1.isImm()) { in emitInstruction()
829 emitConstant(MO1.getImm(), Size); in emitInstruction()
840 if (MO1.isGlobal()) { in emitInstruction()
841 bool Indirect = gvNeedsNonLazyPtr(MO1, TM); in emitInstruction()
842 emitGlobalAddress(MO1.getGlobal(), rt, MO1.getOffset(), 0, in emitInstruction()
844 } else if (MO1.isSymbol()) in emitInstruction()
845 emitExternalSymbolAddress(MO1.getSymbolName(), rt); in emitInstruction()
846 else if (MO1.isCPI()) in emitInstruction()
847 emitConstPoolAddress(MO1.getIndex(), rt); in emitInstruction()
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DX86FloatingPoint.cpp1320 const MachineOperand &MO1 = MI->getOperand(1); in handleSpecialFP() local
1323 unsigned SrcST = MO1.getReg() - X86::ST0; in handleSpecialFP()
1324 bool KillsSrc = MI->killsRegister(MO1.getReg()); in handleSpecialFP()
1328 unsigned SrcFP = getFPReg(MO1); in handleSpecialFP()
1381 unsigned SrcFP = getFPReg(MO1); in handleSpecialFP()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp566 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in EncodeAddrModeOpValues() local
570 int32_t SImm = MO1.getImm(); in EncodeAddrModeOpValues()
874 const MCOperand &MO1 = MI.getOperand(OpIdx); in getThumbAddrModeRegRegOpValue() local
876 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue()
1014 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in getT2AddrModeImm0_1020s4OpValue() local
1016 unsigned Imm8 = MO1.getImm(); in getT2AddrModeImm0_1020s4OpValue()
1081 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getLdStSORegOpValue() local
1084 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getLdStSORegOpValue()
1118 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getAddrMode2OffsetOpValue() local
1119 unsigned Imm = MO1.getImm(); in getAddrMode2OffsetOpValue()
[all …]
/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp555 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in EncodeAddrModeOpValues() local
559 int32_t SImm = MO1.getImm(); in EncodeAddrModeOpValues()
863 const MCOperand &MO1 = MI.getOperand(OpIdx); in getThumbAddrModeRegRegOpValue() local
865 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue()
1003 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in getT2AddrModeImm0_1020s4OpValue() local
1005 unsigned Imm8 = MO1.getImm(); in getT2AddrModeImm0_1020s4OpValue()
1070 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getLdStSORegOpValue() local
1073 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getLdStSORegOpValue()
1107 const MCOperand &MO1 = MI.getOperand(OpIdx+1); in getAddrMode2OffsetOpValue() local
1108 unsigned Imm = MO1.getImm(); in getAddrMode2OffsetOpValue()
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/external/capstone/arch/ARM/
DARMInstPrinter.c445 MCOperand *MO1 = MCInst_getOperand(MI, 1); in ARM_printInst() local
462 printRegName(MI->csh, O, MCOperand_getReg(MO1)); in ARM_printInst()
466 …->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MO1); in ARM_printInst()
484 MCOperand *MO1 = MCInst_getOperand(MI, 1); in ARM_printInst() local
500 printRegName(MI->csh, O, MCOperand_getReg(MO1)); in ARM_printInst()
503 …->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].reg = MCOperand_getReg(MO1); in ARM_printInst()
795 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); in printThumbLdrLabelOperand() local
800 OffImm = (int32_t)MCOperand_getImm(MO1); in printThumbLdrLabelOperand()
834 MCOperand *MO1 = MCInst_getOperand(MI, OpNum); in printSORegRegOperand() local
839 printRegName(MI->csh, O, MCOperand_getReg(MO1)); in printSORegRegOperand()
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/external/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp837 const MachineOperand &MO1 = MI.getOperand(1); in expandMI() local
838 unsigned Flags = MO1.getTargetFlags(); in expandMI()
846 if (MO1.isGlobal()) { in expandMI()
847 MIB1.addGlobalAddress(MO1.getGlobal(), 0, Flags | AArch64II::MO_PAGE); in expandMI()
848 MIB2.addGlobalAddress(MO1.getGlobal(), 0, in expandMI()
850 } else if (MO1.isSymbol()) { in expandMI()
851 MIB1.addExternalSymbol(MO1.getSymbolName(), Flags | AArch64II::MO_PAGE); in expandMI()
852 MIB2.addExternalSymbol(MO1.getSymbolName(), in expandMI()
855 assert(MO1.isCPI() && in expandMI()
857 MIB1.addConstantPoolIndex(MO1.getIndex(), MO1.getOffset(), in expandMI()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp840 const MachineOperand &MO1 = MI.getOperand(1); in expandMI() local
841 unsigned Flags = MO1.getTargetFlags(); in expandMI()
849 if (MO1.isGlobal()) { in expandMI()
850 MIB1.addGlobalAddress(MO1.getGlobal(), 0, Flags | AArch64II::MO_PAGE); in expandMI()
851 MIB2.addGlobalAddress(MO1.getGlobal(), 0, in expandMI()
853 } else if (MO1.isSymbol()) { in expandMI()
854 MIB1.addExternalSymbol(MO1.getSymbolName(), Flags | AArch64II::MO_PAGE); in expandMI()
855 MIB2.addExternalSymbol(MO1.getSymbolName(), in expandMI()
858 assert(MO1.isCPI() && in expandMI()
860 MIB1.addConstantPoolIndex(MO1.getIndex(), MO1.getOffset(), in expandMI()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMCodeEmitter.cpp250 const MachineOperand &MO1 = MI.getOperand(Op + 1); in getAddrModeImm12OpValue() local
256 int32_t Imm12 = MO1.getImm(); in getAddrModeImm12OpValue()
292 const MachineOperand &MO1 = MI.getOperand(Op + 1); in getAddrMode5OpValue() local
298 int32_t Imm12 = MO1.getImm(); in getAddrMode5OpValue()
686 const MachineOperand &MO1 = MI.getOperand(1); in emitMOVi32immInstruction() local
691 unsigned Lo16 = getMovi32Value(MI, MO1, ARM::reloc_arm_movw) & 0xFFFF; in emitMOVi32immInstruction()
704 unsigned Hi16 = getMovi32Value(MI, MO1, ARM::reloc_arm_movt) >> 16; in emitMOVi32immInstruction()
722 const MachineOperand &MO1 = MI.getOperand(1); in emitMOVi2piecesInstruction() local
723 assert(MO1.isImm() && ARM_AM::isSOImmTwoPartVal(MO1.getImm()) && in emitMOVi2piecesInstruction()
725 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO1.getImm()); in emitMOVi2piecesInstruction()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/
DProcessImplicitDefs.cpp66 MachineOperand &MO1 = MI->getOperand(1); in isUndefCopy() local
67 if (MO1.getReg() != Reg) in isUndefCopy()
/external/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64MCCodeEmitter.cpp249 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in getAddSubImmOpValue() local
250 assert(AArch64_AM::getShiftType(MO1.getImm()) == AArch64_AM::LSL && in getAddSubImmOpValue()
252 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64MCCodeEmitter.cpp264 const MCOperand &MO1 = MI.getOperand(OpIdx + 1); in getAddSubImmOpValue() local
265 assert(AArch64_AM::getShiftType(MO1.getImm()) == AArch64_AM::LSL && in getAddSubImmOpValue()
267 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue()
/external/llvm/lib/Target/Hexagon/
DHexagonAsmPrinter.cpp412 MCOperand &MO1 = MappedInst.getOperand(1); in HexagonProcessInstruction() local
413 unsigned High = RI->getSubReg(MO1.getReg(), Hexagon::subreg_hireg); in HexagonProcessInstruction()
414 unsigned Low = RI->getSubReg(MO1.getReg(), Hexagon::subreg_loreg); in HexagonProcessInstruction()
/external/llvm/lib/Target/AArch64/InstPrinter/
DAArch64InstPrinter.cpp1178 const MCOperand MO1 = MI->getOperand(OpNum + 1); in printAMIndexedWB() local
1180 if (MO1.isImm()) { in printAMIndexedWB()
1181 O << ", #" << formatImm(MO1.getImm() * Scale); in printAMIndexedWB()
1183 assert(MO1.isExpr() && "Unexpected operand type!"); in printAMIndexedWB()
1185 MO1.getExpr()->print(O, &MAI); in printAMIndexedWB()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonAsmPrinter.cpp470 MCOperand &MO1 = MappedInst.getOperand(1); in HexagonProcessInstruction() local
471 unsigned High = RI->getSubReg(MO1.getReg(), Hexagon::isub_hi); in HexagonProcessInstruction()
472 unsigned Low = RI->getSubReg(MO1.getReg(), Hexagon::isub_lo); in HexagonProcessInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/AsmParser/
DHexagonAsmParser.cpp1225 static MCInst makeCombineInst(int opCode, MCOperand &Rdd, MCOperand &MO1, in makeCombineInst() argument
1230 TmpInst.addOperand(MO1); in makeCombineInst()
1586 MCOperand &MO1 = Inst.getOperand(1); in processInstruction() local
1594 Inst = makeCombineInst(Hexagon::A2_combineii, Rdd, MO1, MO2); in processInstruction()
1601 MCOperand &MO1 = Inst.getOperand(1); in processInstruction() local
1603 if (MO1.getExpr()->evaluateAsAbsolute(Value)) { in processInstruction()
1609 Inst = makeCombineInst(Hexagon::A4_combineii, Rdd, MO1, MO2); in processInstruction()
/external/llvm/lib/Target/Hexagon/AsmParser/
DHexagonAsmParser.cpp1461 MCOperand &MO1, MCOperand &MO2) { in makeCombineInst() argument
1465 TmpInst.addOperand(MO1); in makeCombineInst()
1808 MCOperand &MO1 = Inst.getOperand(1); in processInstruction() local
1816 Inst = makeCombineInst(Hexagon::A2_combineii, Rdd, MO1, MO2); in processInstruction()
1823 MCOperand &MO1 = Inst.getOperand(1); in processInstruction() local
1825 if (MO1.getExpr()->evaluateAsAbsolute(Value)) { in processInstruction()
1831 Inst = makeCombineInst(Hexagon::A4_combineii, Rdd, MO1, MO2); in processInstruction()
/external/llvm/lib/Target/ARM/
DARMExpandPseudoInsts.cpp1272 const MachineOperand &MO1 = MI.getOperand(1); in ExpandMI() local
1273 const GlobalValue *GV = MO1.getGlobal(); in ExpandMI()
1325 const MachineOperand &MO1 = MI.getOperand(1); in ExpandMI() local
1326 const GlobalValue *GV = MO1.getGlobal(); in ExpandMI()
1327 unsigned TF = MO1.getTargetFlags(); in ExpandMI()
1338 .addGlobalAddress(GV, MO1.getOffset(), TF | LO16TF) in ExpandMI()
1343 .addGlobalAddress(GV, MO1.getOffset(), TF | HI16TF) in ExpandMI()
DARMAsmPrinter.cpp1009 const MachineOperand &MO1 = MI->getOperand(1); in EmitJumpTableAddrs() local
1010 unsigned JTI = MO1.getIndex(); in EmitJumpTableAddrs()
1056 const MachineOperand &MO1 = MI->getOperand(1); in EmitJumpTableInsts() local
1057 unsigned JTI = MO1.getIndex(); in EmitJumpTableInsts()
1082 const MachineOperand &MO1 = MI->getOperand(1); in EmitJumpTableTBInst() local
1083 unsigned JTI = MO1.getIndex(); in EmitJumpTableTBInst()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMAsmPrinter.cpp913 const MachineOperand &MO1 = MI->getOperand(1); in EmitJumpTableAddrs() local
914 unsigned JTI = MO1.getIndex(); in EmitJumpTableAddrs()
959 const MachineOperand &MO1 = MI->getOperand(1); in EmitJumpTableInsts() local
960 unsigned JTI = MO1.getIndex(); in EmitJumpTableInsts()
989 const MachineOperand &MO1 = MI->getOperand(1); in EmitJumpTableTBInst() local
990 unsigned JTI = MO1.getIndex(); in EmitJumpTableTBInst()

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