/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelLowering.h | 271 MOVSD, enumerator
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D | X86InstrFragmentsSIMD.td | 137 def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2Op>;
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D | X86ISelLowering.cpp | 2801 case X86ISD::MOVSD: in isTargetShuffle() 2882 case X86ISD::MOVSD: in getTargetShuffleNode() 4597 case X86ISD::MOVSD: { in getShuffleScalarElt() 6376 return getTargetShuffleNode(X86ISD::MOVSD, dl, VT, V1, V2, DAG); in getMOVLP() 6648 return getTargetShuffleNode(X86ISD::MOVSD, dl, VT, V1, V2, DAG); in LowerVECTOR_SHUFFLE() 10731 case X86ISD::MOVSD: return "X86ISD::MOVSD"; in getTargetNodeName() 14249 case X86ISD::MOVSD: in PerformDAGCombine()
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D | X86InstrInfo.td | 815 def MOVSD : I<0xA5, RawFrm, (outs), (ins), "movs{l|d}", []>; 1708 def : InstAlias<"movsd", (MOVSD)>;
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D | X86GenAsmWriter.inc | 1560 5913U, // MOVSD 6033 "QI2PQIrm\000MOVQxrxr\000MOVSB\000MOVSD\000MOVSDmr\000MOVSDrm\000MOVSDrr" 7224 case X86::MOVSD: 7226 // (MOVSD)
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D | X86GenAsmWriter1.inc | 1560 4577U, // MOVSD 6776 "QI2PQIrm\000MOVQxrxr\000MOVSB\000MOVSD\000MOVSDmr\000MOVSDrm\000MOVSDrr" 7967 case X86::MOVSD: 7969 // (MOVSD)
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D | X86GenAsmMatcher.inc | 3965 { X86::MOVSD, "movsd", Convert, { }, 0}, 3971 { X86::MOVSD, "movsl", Convert, { }, 0},
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D | X86GenInstrInfo.inc | 1563 MOVSD = 1547, 5731 …47, 0, 0, 0, 0, "MOVSD", 0|(1<<MCID::UnmodeledSideEffects), 0x14a000001ULL, ImplicitList39, Implic…
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D | X86InstrSSE.td | 470 // MOVSD to the lower bits. 496 // Shuffle with MOVSD
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D | X86GenDisassemblerTables.inc | 18583 "MOVSD" 47672 0x60b /* MOVSD*/ 54699 0x60b /* MOVSD*/ 69021 0x60b /* MOVSD*/ 76186 0x60b /* MOVSD*/ 97256 0x60b /* MOVSD*/ 104275 0x60b /* MOVSD*/
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D | X86GenDAGISel.inc | 46612 /*SwitchOpcode*/ 1|128,2/*257*/, TARGET_VAL(X86ISD::MOVSD),// ->97597
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 400 MOVSD, enumerator
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D | X86InstrFragmentsSIMD.td | 376 def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2Op>;
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D | X86IntrinsicsInfo.h | 809 X86ISD::MOVSD, 0),
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D | X86ISelLowering.cpp | 3812 case X86ISD::MOVSD: in isTargetShuffle() 3862 case X86ISD::MOVSD: in getTargetShuffleNode() 4966 case X86ISD::MOVSD: in getTargetShuffleMask() 8443 return DAG.getNode(EltVT == MVT::f32 ? X86ISD::MOVSS : X86ISD::MOVSD, DL, in lowerVectorShuffleAsElementInsertion() 8959 isShuffleFoldableLoad(V1S) ? X86ISD::MOVLPD : X86ISD::MOVSD, in lowerV2F64VectorShuffle() 20139 TargetOpcode = X86ISD::MOVSD; in LowerShift() 20150 TargetOpcode = X86ISD::MOVSD; in LowerShift() 20170 if (TargetOpcode == X86ISD::MOVSD) in LowerShift() 22243 case X86ISD::MOVSD: return "X86ISD::MOVSD"; in getTargetNodeName() 31012 case X86ISD::MOVSD: in PerformDAGCombine()
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D | X86InstrSSE.td | 570 defm MOVSD : sse12_move<FR64, X86Movsd, v2f64, f64mem, "movsd", 578 defm MOVSD : sse12_move_rm<FR64, f64mem, loadf64, "movsd", 717 // MOVSD to the lower bits. 736 // Shuffle with MOVSD
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D | X86InstrAVX512.td | 2988 // AVX-512 MOVSS, MOVSD
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 411 MOVSD, enumerator
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D | X86InstrFragmentsSIMD.td | 373 def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2OpFP>;
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D | X86ISelLowering.cpp | 4378 case X86ISD::MOVSD: in isTargetShuffle() 5930 case X86ISD::MOVSD: in getTargetShuffleMask() 10788 return DAG.getNode(EltVT == MVT::f32 ? X86ISD::MOVSS : X86ISD::MOVSD, DL, in lowerVectorShuffleAsElementInsertion() 11375 X86ISD::MOVSD, DL, MVT::v2f64, V2, in lowerV2F64VectorShuffle() 26069 case X86ISD::MOVSD: return "X86ISD::MOVSD"; in getTargetNodeName() 29421 Shuffle = X86ISD::MOVSD; in matchBinaryVectorShuffle() 30628 (Opcode == X86ISD::MOVSD || Opcode == X86ISD::UNPCKH || in combineTargetShuffle() 30641 if (Opcode == X86ISD::MOVSD) { in combineTargetShuffle() 30716 case X86ISD::MOVSD: in combineTargetShuffle() 39715 case X86ISD::MOVSD: in PerformDAGCombine()
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D | X86InstrSSE.td | 241 defm MOVSD : sse12_move<FR64, X86Movsd, v2f64, f64mem, "movsd", 242 SSEPackedDouble, "MOVSD", UseSSE2>, XD; 247 defm MOVSD : sse12_move_rm<FR64, f64mem, loadf64, "movsd",
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D | X86InstrAVX512.td | 3939 // AVX-512 MOVSS, MOVSD
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
D | X86GenFastISel.inc | 9819 // FastEmit functions for X86ISD::MOVSD. 12014 case X86ISD::MOVSD: return fastEmit_X86ISD_MOVSD_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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/external/syzkaller/pkg/ifuzz/gen/ |
D | all-enc-instructions.txt | 7205 ICLASS : MOVSD
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