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Searched refs:MOVSS (Results 1 – 24 of 24) sorted by relevance

/external/mesa3d/src/mesa/x86/
Dsse_normal.S76 MOVSS ( M(0), XMM1 ) /* m0 */
77 MOVSS ( M(5), XMM2 ) /* m5 */
79 MOVSS ( ARG_SCALE, XMM0 ) /* scale */
90 MOVSS ( S(2), XMM2 ) /* uz */
92 MOVSS ( XMM2, D(2) ) /* ->D(2) */
138 MOVSS ( M(0), XMM0 ) /* m0 */
139 MOVSS ( M(4), XMM1 ) /* m4 */
142 MOVSS ( ARG_SCALE, XMM4 ) /* scale */
146 MOVSS ( M(1), XMM1 ) /* m1 */
147 MOVSS ( M(5), XMM2 ) /* m5 */
[all …]
Dsse_xform3.S85 MOVSS ( REGOFF(0, ESI), XMM4 ) /* | | | ox */
87 MOVSS ( REGOFF(4, ESI), XMM5 ) /* | | | oy */
89 MOVSS ( REGOFF(8, ESI), XMM6 ) /* | | | oz */
152 MOVSS ( S(2), XMM0 )
153 MOVSS ( XMM0, D(2) )
204 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
205 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
208 MOVSS ( M(10), XMM3 ) /* - | - | - | m10 */
209 MOVSS ( M(14), XMM4 ) /* - | - | - | m14 */
219 MOVSS ( S(2), XMM0 ) /* sz */
[all …]
Dsse_xform1.S82 MOVSS( S(0), XMM2 ) /* ox */
186 MOVSS( M(0), XMM0 ) /* m0 */
187 MOVSS( M(12), XMM1 ) /* m12 */
188 MOVSS( M(13), XMM2 ) /* m13 */
189 MOVSS( M(14), XMM3 ) /* m14 */
193 MOVSS( S(0), XMM4 ) /* ox */
196 MOVSS( XMM4, D(0) )
198 MOVSS( XMM2, D(1) )
199 MOVSS( XMM3, D(2) )
248 MOVSS( M(0), XMM1 ) /* m0 */
[all …]
Dsse_xform2.S82 MOVSS( S(0), XMM3 ) /* ox */
85 MOVSS( S(1), XMM4 ) /* oy */
192 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
193 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
196 MOVSS ( M(14), XMM3 ) /* - | - | - | m14 */
205 MOVSS ( XMM3, D(2) ) /* -> D(2) */
251 MOVSS ( M(0), XMM1 ) /* - | - | - | m0 */
252 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */
254 MOVSS ( M(14), XMM3 ) /* m14 */
262 MOVSS( XMM3, D(2) ) /* ->D(2) */
[all …]
Dsse_xform4.S78 MOVSS( SRC(0), XMM0 ) /* ox */
82 MOVSS( SRC(1), XMM1 ) /* oy */
86 MOVSS( SRC(2), XMM2 ) /* oz */
90 MOVSS( SRC(3), XMM3 ) /* ow */
150 MOVSS( SRC(0), XMM4 ) /* ox */
154 MOVSS( SRC(1), XMM5 ) /* oy */
158 MOVSS( SRC(2), XMM6 ) /* oz */
162 MOVSS( SRC(3), XMM7 ) /* ow */
171 MOVSS( SRC(3), XMM4 ) /* ow */
172 MOVSS( XMM4, DST(3) ) /* ->D(3) */
Dassyntax.h1678 #define MOVSS(a, b) movss P_ARG2(a, b) macro
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.h272 MOVSS, enumerator
DX86InstrFragmentsSIMD.td138 def X86Movss : SDNode<"X86ISD::MOVSS", SDTShuff2Op>;
DX86ISelLowering.cpp2800 case X86ISD::MOVSS: in isTargetShuffle()
2881 case X86ISD::MOVSS: in getTargetShuffleNode()
4596 case X86ISD::MOVSS: in getShuffleScalarElt()
6377 return getTargetShuffleNode(X86ISD::MOVSS, dl, VT, V1, V2, DAG); in getMOVLP()
6651 return getTargetShuffleNode(X86ISD::MOVSS, dl, VT, V1, V2, DAG); in LowerVECTOR_SHUFFLE()
10732 case X86ISD::MOVSS: return "X86ISD::MOVSS"; in getTargetNodeName()
14248 case X86ISD::MOVSS: in PerformDAGCombine()
DX86InstrSSE.td414 // MOVSS to the lower bits.
442 // Shuffle with MOVSS
DX86GenDAGISel.inc46545 /*SwitchOpcode*/ 21|128,1/*149*/, TARGET_VAL(X86ISD::MOVSS),// ->97336
/external/llvm/lib/Target/X86/
DX86ISelLowering.h401 MOVSS, enumerator
DX86InstrFragmentsSIMD.td377 def X86Movss : SDNode<"X86ISD::MOVSS", SDTShuff2Op>;
DX86IntrinsicsInfo.h811 X86ISD::MOVSS, 0),
DX86InstrSSE.td568 defm MOVSS : sse12_move<FR32, X86Movss, v4f32, f32mem, "movss",
574 defm MOVSS : sse12_move_rm<FR32, f32mem, loadf32, "movss",
683 // MOVSS to the lower bits.
707 // Shuffle with MOVSS
DX86ISelLowering.cpp3811 case X86ISD::MOVSS: in isTargetShuffle()
3861 case X86ISD::MOVSS: in getTargetShuffleNode()
4965 case X86ISD::MOVSS: in getTargetShuffleMask()
8443 return DAG.getNode(EltVT == MVT::f32 ? X86ISD::MOVSS : X86ISD::MOVSD, DL, in lowerVectorShuffleAsElementInsertion()
20122 unsigned TargetOpcode = X86ISD::MOVSS; in LowerShift()
22244 case X86ISD::MOVSS: return "X86ISD::MOVSS"; in getTargetNodeName()
31011 case X86ISD::MOVSS: in PerformDAGCombine()
DX86InstrAVX512.td2988 // AVX-512 MOVSS, MOVSD
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86ISelLowering.h412 MOVSS, enumerator
DX86InstrFragmentsSIMD.td374 def X86Movss : SDNode<"X86ISD::MOVSS", SDTShuff2OpFP>;
DX86InstrSSE.td239 defm MOVSS : sse12_move<FR32, X86Movss, v4f32, f32mem, "movss",
240 SSEPackedSingle, "MOVSS", UseSSE1>, XS;
245 defm MOVSS : sse12_move_rm<FR32, f32mem, loadf32, "movss",
294 // MOVSS to the lower bits.
325 // MOVSS to the lower bits.
DX86ISelLowering.cpp4377 case X86ISD::MOVSS: in isTargetShuffle()
5929 case X86ISD::MOVSS: in getTargetShuffleMask()
10788 return DAG.getNode(EltVT == MVT::f32 ? X86ISD::MOVSS : X86ISD::MOVSD, DL, in lowerVectorShuffleAsElementInsertion()
26070 case X86ISD::MOVSS: return "X86ISD::MOVSS"; in getTargetNodeName()
29427 Shuffle = X86ISD::MOVSS; in matchBinaryVectorShuffle()
30717 case X86ISD::MOVSS: { in combineTargetShuffle()
39714 case X86ISD::MOVSS: in PerformDAGCombine()
DX86InstrAVX512.td3939 // AVX-512 MOVSS, MOVSD
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc9843 // FastEmit functions for X86ISD::MOVSS.
12015 case X86ISD::MOVSS: return fastEmit_X86ISD_MOVSS_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
/external/syzkaller/pkg/ifuzz/gen/
Dall-enc-instructions.txt8456 ICLASS : MOVSS