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Searched refs:MPHY_ZQCR (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-uniphier/dram/
Dumc-pxs2.c205 writel(0x04048900, phy_base + MPHY_ZQCR); in ddrphy_init()
372 tmp = readl(phy_base + MPHY_ZQCR); in ddrphy_impedance_calibration()
374 writel(tmp, phy_base + MPHY_ZQCR); in ddrphy_impedance_calibration()
377 writel(tmp, phy_base + MPHY_ZQCR); in ddrphy_impedance_calibration()
Dddrmphy-regs.h111 #define MPHY_ZQCR (0x090 << MPHY_SHIFT) macro