Searched refs:MR0_REG (Results 1 – 2 of 2) sorted by relevance
| /external/u-boot/drivers/ddr/marvell/a38x/ |
| D | mv_ddr_regs.h | 362 #define MR0_REG 0x15d0 macro
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| D | ddr3_training.c | 201 {MRS0_CMD, MR0_REG},
546 MR0_REG, data_value, in hws_ddr3_tip_init_controller()
550 MR0_REG, twr_mask_table[t_wr] << 9, in hws_ddr3_tip_init_controller()
1587 (dev_num, access_type, if_id, MR0_REG, in ddr3_tip_freq_set()
1837 MR0_REG, mode_info->reg_mr0, MASK_ALL_BITS); in hws_ddr3_tip_mode_read()
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