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Searched refs:MRMSrcReg4VOp3 (Results 1 – 9 of 9) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h330 MRMSrcReg4VOp3 = 50, enumerator
724 case X86II::MRMSrcReg4VOp3: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp889 case X86II::MRMSrcReg4VOp3: { in EmitVEXOpcodePrefix()
1413 case X86II::MRMSrcReg4VOp3: { in encodeInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/
DX86RecognizableInstr.h114 MRMSrcReg4VOp3 = 50, enumerator
DX86RecognizableInstr.cpp568 case X86Local::MRMSrcReg4VOp3: in emitInstructionSpecifier()
731 case X86Local::MRMSrcReg4VOp3: in emitDecodePath()
DX86FoldTablesEmitter.cpp429 RegFormNum == X86Local::MRMSrcReg4VOp3) || in areOppositeForms()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrXOP.td97 def rr : IXOP<opc, MRMSrcReg4VOp3, (outs VR128:$dst),
DX86InstrFormats.td40 def MRMSrcReg4VOp3 : Format<50>;
DX86InstrShiftRotate.td840 def rr : I<0xF7, MRMSrcReg4VOp3, (outs RC:$dst), (ins RC:$src1, RC:$src2),
DX86InstrInfo.td2413 def rr : I<opc, MRMSrcReg4VOp3, (outs RC:$dst), (ins RC:$src1, RC:$src2),
2439 def rr : I<opc, MRMSrcReg4VOp3, (outs RC:$dst), (ins RC:$src1, RC:$src2),