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Searched refs:MRMSrcRegOp4 (Results 1 – 8 of 8) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h335 MRMSrcRegOp4 = 51, enumerator
725 case X86II::MRMSrcRegOp4: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp901 case X86II::MRMSrcRegOp4: { in EmitVEXOpcodePrefix()
1423 case X86II::MRMSrcRegOp4: { in encodeInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/
DX86RecognizableInstr.h115 MRMSrcRegOp4 = 51, enumerator
DX86RecognizableInstr.cpp575 case X86Local::MRMSrcRegOp4: in emitInstructionSpecifier()
732 case X86Local::MRMSrcRegOp4: in emitDecodePath()
DX86FoldTablesEmitter.cpp431 RegFormNum == X86Local::MRMSrcRegOp4)) in areOppositeForms()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrXOP.td330 def rrr_REV : IXOPi8Reg<opc, MRMSrcRegOp4, (outs VR128:$dst),
374 def rrr_REV : IXOPi8Reg<opc, MRMSrcRegOp4, (outs RC:$dst),
422 def rr_REV : IXOP5<Opc, MRMSrcRegOp4, (outs RC:$dst),
DX86InstrFMA.td392 def rr : FMA4S<opc, MRMSrcRegOp4, (outs RC:$dst),
430 def rr_Int : FMA4S_Int<opc, MRMSrcRegOp4, (outs VR128:$dst),
467 def rr : FMA4<opc, MRMSrcRegOp4, (outs VR128:$dst),
494 def Yrr : FMA4<opc, MRMSrcRegOp4, (outs VR256:$dst),
DX86InstrFormats.td41 def MRMSrcRegOp4 : Format<51>;