Searched refs:MR_CMD1 (Results 1 – 2 of 2) sorted by relevance
| /external/u-boot/drivers/ddr/marvell/a38x/ |
| D | ddr3_training_leveling.c | 905 CHECK_STATUS(ddr3_tip_write_mrs_cmd(dev_num, cs_mask0, MR_CMD1, in ddr3_tip_dynamic_write_leveling()
918 (dev_num, cs_mask, MR_CMD1, 0x80, 0x1080)); in ddr3_tip_dynamic_write_leveling()
927 (dev_num, cs_mask, MR_CMD1, 0xc0, 0x12c4)); in ddr3_tip_dynamic_write_leveling()
1036 CHECK_STATUS(ddr3_tip_write_mrs_cmd(dev_num, cs_mask0, MR_CMD1, in ddr3_tip_dynamic_write_leveling()
1040 CHECK_STATUS(ddr3_tip_write_mrs_cmd(dev_num, cs_mask0, MR_CMD1, in ddr3_tip_dynamic_write_leveling()
1046 (dev_num, cs_mask0, MR_CMD1, 0x0, 0x1080)); in ddr3_tip_dynamic_write_leveling()
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| D | ddr3_training_ip_flow.h | 101 MR_CMD1, enumerator
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