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Searched refs:MSC0 (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/board/h2200/
Dh2200.c58 clrsetbits_le32(MSC0, 0xffffffff, CONFIG_SYS_MSC0_VAL); in dram_init()
/external/u-boot/arch/arm/cpu/pxa/
Dpxa2xx.c65 writelrb(CONFIG_SYS_MSC0_VAL, MSC0); in pxa2xx_dram_init()
/external/u-boot/arch/arm/include/asm/arch-pxa/
Dpxa-regs.h2268 #define MSC0 0x4A000008 /* Static Memory Control Register 0 */ macro
2451 #define MSC0 0x48000008 /* Static Memory Control Register 0 */ macro
/external/u-boot/include/
DSA-1100.h1921 #define MSC0 (MSC [0]) /* Static memory Control reg. 0 */ macro
1927 #define MSC0 io_p2v(0xa0000010) macro