Searched refs:MTFSB1 (Results 1 – 16 of 16) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 150 MTFSB1, enumerator
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| D | PPCInstrFormats.td | 371 // This is used for MFFS, MTFSB0, MTFSB1. 42 is arbitrary; this series of
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| D | PPCInstrInfo.td | 74 def PPCmtfsb1 : SDNode<"PPCISD::MTFSB1", SDTypeProfile<0, 1, [SDTCisInt<0>]>,
1128 def MTFSB1 : XForm_43<63, 38, (outs), (ins u5imm:$FM),
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| D | PPCISelLowering.cpp | 466 case PPCISD::MTFSB1: return "PPCISD::MTFSB1"; in getTargetNodeName()
4605 Result = DAG.getNode(PPCISD::MTFSB1, dl, NodeTys, Ops, 2); in ReplaceNodeResults()
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| /external/v8/src/ppc/ |
| D | disasm-ppc.cc | 1086 case MTFSB1: { in DecodeExt4()
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| D | constants-ppc.h | 1523 V(mtfsb1, MTFSB1, 0xFC00004C) \
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| D | assembler-ppc.cc | 1905 emit(EXT4 | MTFSB1 | bt * B21 | rc); in mtfsb1()
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| D | simulator-ppc.cc | 3676 case MTFSB1: { in ExecuteGeneric()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrFormats.td | 668 // This is used for MFFS, MTFSB0, MTFSB1. 42 is arbitrary; this series of
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| D | PPCInstrInfo.td | 2421 def MTFSB1 : XForm_43<63, 38, (outs), (ins u5imm:$FM),
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| D | PPCISelLowering.cpp | 9390 BuildMI(*BB, MI, dl, TII->get(PPC::MTFSB1)).addImm(31); in EmitInstrWithCustomInserter()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrFormats.td | 749 // This is used for MFFS, MTFSB0, MTFSB1. 42 is arbitrary; this series of
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| D | PPCInstrInfo.td | 2663 def MTFSB1 : XForm_43<63, 38, (outs), (ins u5imm:$FM),
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| D | PPCISelLowering.cpp | 10760 BuildMI(*BB, MI, dl, TII->get(PPC::MTFSB1)).addImm(31); in EmitInstrWithCustomInserter()
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| /external/capstone/arch/PowerPC/ |
| D | PPCGenAsmWriter.inc | 719 394613U, // MTFSB1
1992 0U, // MTFSB1
3639 // DSS, MBAR, MTFSB0, MTFSB1, TD, TDI, TW, TWI, gBC, gBCA, gBCCTR, gBCCTR...
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| D | PPCGenDisassemblerTables.inc | 2034 /* 8461 */ MCD_OPC_Decode, 187, 5, 76, // Opcode: MTFSB1
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