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Searched refs:MTLR (Results 1 – 11 of 11) sorted by relevance

/external/pcre/dist2/src/sljit/
DsljitNativePPC_common.c190 #define MTLR (HI(31) | LO(467) | 0x80000) macro
727 FAIL_IF(push_inst(compiler, MTLR | S(0))); in sljit_emit_return()
1777 FAIL_IF(push_inst(compiler, MTLR | S(src))); in sljit_emit_fast_return()
1780 FAIL_IF(push_inst(compiler, MTLR | S(TMP_REG2))); in sljit_emit_fast_return()
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCInstrInfo.cpp509 NewMIs.push_back(BuildMI(MF, DL, get(PPC::MTLR)).addReg(PPC::R11)); in LoadRegFromStackSlot()
DPPCFrameLowering.cpp653 BuildMI(MBB, MBBI, dl, TII.get(PPC::MTLR)).addReg(PPC::R0); in emitEpilogue()
DPPCInstrInfo.td1074 def MTLR : XFXForm_7_ext<31, 467, 8, (outs), (ins GPRC:$rS),
/external/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp1135 : PPC::MTLR ); in emitEpilogue()
DPPCInstrInfo.td2327 def MTLR : XFXForm_7_ext<31, 467, 8, (outs), (ins gprc:$rS),
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp1263 : PPC::MTLR ); in emitEpilogue()
DP9InstrResources.td924 (instregex "MTLR(8)?$")
DPPCInstrInfo.td2568 def MTLR : XFXForm_7_ext<31, 467, 8, (outs), (ins gprc:$rS),
/external/capstone/arch/PowerPC/
DPPCGenDisassemblerTables.inc991 /* 4029 */ MCD_OPC_Decode, 189, 5, 35, // Opcode: MTLR
DPPCGenAsmWriter.inc721 283683U, // MTLR
1994 0U, // MTLR