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Searched refs:MUL1 (Results 1 – 11 of 11) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/X86/
DPR36280.ll10 ; CHECK-NEXT: [[MUL1:%.*]] = fmul float [[P1]], [[X:%.*]]
12 ; CHECK-NEXT: [[ADD1:%.*]] = fadd float [[MUL1]], [[Z:%.*]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/Reassociate/
Dmixed-fast-nonfast-fp.ll24 ; CHECK-NEXT: [[MUL1:%.*]] = fmul reassoc float %a, %c
28 ; CHECK-NEXT: [[ADD1:%.*]] = fadd fast float [[MUL1]], [[MUL3]]
Dfast-ReassociateVector.ll23 ; CHECK-NEXT: [[MUL1:%.*]] = fmul reassoc <4 x float> [[B:%.*]], [[C]]
24 ; CHECK-NEXT: [[ADD:%.*]] = fadd reassoc <4 x float> [[MUL]], [[MUL1]]
/external/webp/src/dsp/
Ddec.c40 #define MUL1(a) ((((a) * 20091) >> 16) + (a)) macro
51 const int c = MUL2(in[4]) - MUL1(in[12]); // [-3783, 3783] in TransformOne_C()
52 const int d = MUL1(in[4]) + MUL2(in[12]); // [-3785, 3781] in TransformOne_C()
72 const int c = MUL2(tmp[4]) - MUL1(tmp[12]); in TransformOne_C()
73 const int d = MUL1(tmp[4]) + MUL2(tmp[12]); in TransformOne_C()
87 const int d4 = MUL1(in[4]); in TransformAC3_C()
89 const int d1 = MUL1(in[1]); in TransformAC3_C()
95 #undef MUL1
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
Dfmul.ll356 ; CHECK-NEXT: [[MUL1:%.*]] = fmul float [[X:%.*]], [[Y:%.*]]
357 ; CHECK-NEXT: [[MUL2:%.*]] = fmul fast float [[MUL1]], [[X]]
358 ; CHECK-NEXT: call void @use_f32(float [[MUL1]])
672 ; CHECK-NEXT: [[MUL1:%.*]] = fmul fast float [[MUL]], [[X]]
673 ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[MUL1]], [[MUL]]
Dand-or-not.ll531 ; CHECK-NEXT: [[MUL1:%.*]] = mul i32 [[OR1]], [[OR2]]
532 ; CHECK-NEXT: [[MUL2:%.*]] = mul i32 [[MUL1]], [[AND]]
555 ; CHECK-NEXT: [[MUL1:%.*]] = mul i32 [[AND]], [[NOTOR]]
556 ; CHECK-NEXT: [[MUL2:%.*]] = mul i32 [[MUL1]], [[OR2]]
Dfast-math.ll8 ; CHECK-NEXT: [[MUL1:%.*]] = fmul fast float [[A:%.*]], 0x4006147AE0000000
9 ; CHECK-NEXT: ret float [[MUL1]]
21 ; CHECK-NEXT: [[MUL1:%.*]] = fmul float [[MUL]], 0x4002666660000000
22 ; CHECK-NEXT: ret float [[MUL1]]
31 ; CHECK-NEXT: [[MUL1:%.*]] = fmul fast float [[A:%.*]], 0x4006147AE0000000
32 ; CHECK-NEXT: ret float [[MUL1]]
Dadd2.ll282 ; CHECK-NEXT: [[MUL1:%.*]] = mul nsw i32 [[X:%.*]], [[Y:%.*]]
283 ; CHECK-NEXT: [[ADD:%.*]] = mul nsw i32 [[MUL1]], 6
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dfneg-combines.ll261 ; GCN-NEXT: v_mul_f32_e32 [[MUL1:v[0-9]+]], -4.0, [[MUL0]]
263 ; GCN-NEXT: buffer_store_dword [[MUL1]]
516 ; GCN-NEXT: v_mul_f32_e32 [[MUL1:v[0-9]+]], -4.0, [[MAX0]]
518 ; GCN-NEXT: buffer_store_dword [[MUL1]]
663 ; GCN-NEXT: v_mul_f32_e32 [[MUL1:v[0-9]+]], -4.0, [[MAX0]]
665 ; GCN-NEXT: buffer_store_dword [[MUL1]]
1809 ; GCN: v_mul_f32_e32 [[MUL1:v[0-9]+]], [[XOR]], [[C]]
1810 ; GCN: buffer_store_dword [[MUL1]]
1939 ; GCN: v_mul_f32_e64 [[MUL1:v[0-9]+]], -[[A]], [[C]]
1941 ; GCN-NEXT: buffer_store_dword [[MUL1]]
[all …]
Dsetcc-fneg-constant.ll83 ; GCN: v_mul_f32_e64 [[MUL1:v[0-9]+]], -[[MUL0]], [[MUL0]]
84 ; GCN: buffer_store_dword [[MUL1]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/GlobalISel/
Dregbankselect-X86_64.mir439 ; FAST: [[MUL1:%[0-9]+]]:gpr(s32) = G_MUL [[DEF1]], [[DEF1]]
449 ; GREEDY: [[MUL1:%[0-9]+]]:gpr(s32) = G_MUL [[DEF1]], [[DEF1]]