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Searched refs:MUL2 (Results 1 – 25 of 28) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dfmul-2-combine-multi-use.ll42 ; GCN-DAG: v_add_f32_e64 [[MUL2:v[0-9]+]], [[X:s[0-9]+]], s{{[0-9]+}}
44 ; GCN-DAG: buffer_store_dword [[MUL2]]
57 ; GCN-DAG: v_add_f32_e64 [[MUL2:v[0-9]+]], |[[X:s[0-9]+]]|, |s{{[0-9]+}}|
59 ; GCN-DAG: buffer_store_dword [[MUL2]]
141 ; GCN-DAG: v_add_f16_e64 [[MUL2:v[0-9]+]], [[X:s[0-9]+]], s{{[0-9]+}}
146 ; GCN-DAG: buffer_store_short [[MUL2]]
161 ; GCN-DAG: v_add_f16_e64 [[MUL2:v[0-9]+]], |[[X:s[0-9]+]]|, |s{{[0-9]+}}|
166 ; GCN-DAG: buffer_store_short [[MUL2]]
/external/llvm/test/CodeGen/AMDGPU/
Dfmul-2-combine-multi-use.ll30 ; GCN-DAG: v_add_f32_e64 [[MUL2:v[0-9]+]], [[X:s[0-9]+]], s{{[0-9]+}}
32 ; GCN-DAG: buffer_store_dword [[MUL2]]
45 ; GCN-DAG: v_add_f32_e64 [[MUL2:v[0-9]+]], |[[X:s[0-9]+]]|, |s{{[0-9]+}}|
47 ; GCN-DAG: buffer_store_dword [[MUL2]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/X86/
DPR36280.ll11 ; CHECK-NEXT: [[MUL2:%.*]] = fmul float [[P2]], [[Y:%.*]]
13 ; CHECK-NEXT: [[ADD2:%.*]] = fadd float [[MUL2]], [[ADD1]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
Dfmul.ll163 ; CHECK-NEXT: [[MUL2:%.*]] = fmul float [[MUL]], [[SUB1]]
164 ; CHECK-NEXT: ret float [[MUL2]]
250 ; CHECK-NEXT: [[MUL2:%.*]] = fmul double [[SQRT]], [[F]]
251 ; CHECK-NEXT: ret double [[MUL2]]
301 ; CHECK-NEXT: [[MUL2:%.*]] = fmul reassoc float [[TMP1]], [[Y:%.*]]
302 ; CHECK-NEXT: ret float [[MUL2]]
314 ; CHECK-NEXT: [[MUL2:%.*]] = fmul fast float [[TMP1]], [[Y:%.*]]
315 ; CHECK-NEXT: ret float [[MUL2]]
328 ; CHECK-NEXT: [[MUL2:%.*]] = fmul reassoc nnan float [[TMP1]], [[Y:%.*]]
329 ; CHECK-NEXT: ret float [[MUL2]]
[all …]
Dand-or-not.ll532 ; CHECK-NEXT: [[MUL2:%.*]] = mul i32 [[MUL1]], [[AND]]
533 ; CHECK-NEXT: ret i32 [[MUL2]]
556 ; CHECK-NEXT: [[MUL2:%.*]] = mul i32 [[MUL1]], [[OR2]]
557 ; CHECK-NEXT: ret i32 [[MUL2]]
Dfast-math.ll936 ; CHECK-NEXT: [[MUL2:%.*]] = fmul fast double [[MUL]], [[Y:%.*]]
937 ; CHECK-NEXT: [[SQRT:%.*]] = call fast double @llvm.sqrt.f64(double [[MUL2]])
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/Reassociate/
Dmixed-fast-nonfast-fp.ll25 ; CHECK-NEXT: [[MUL2:%.*]] = fmul fast float %b, %a
29 ; CHECK-NEXT: [[ADD2:%.*]] = fadd reassoc float [[MUL2]], [[MUL4]]
/external/webp/src/dsp/
Ddec.c41 #define MUL2(a) (((a) * 35468) >> 16) macro
51 const int c = MUL2(in[4]) - MUL1(in[12]); // [-3783, 3783] in TransformOne_C()
52 const int d = MUL1(in[4]) + MUL2(in[12]); // [-3785, 3781] in TransformOne_C()
72 const int c = MUL2(tmp[4]) - MUL1(tmp[12]); in TransformOne_C()
73 const int d = MUL1(tmp[4]) + MUL2(tmp[12]); in TransformOne_C()
86 const int c4 = MUL2(in[4]); in TransformAC3_C()
88 const int c1 = MUL2(in[1]); in TransformAC3_C()
96 #undef MUL2
Dmsa_macro.h1224 #define MUL2(in0, in1, in2, in3, out0, out1) do { \ macro
1231 MUL2(in0, in1, in2, in3, out0, out1); \
1232 MUL2(in4, in5, in6, in7, out2, out3); \
Dupsampling_msa.c48 MUL2(in0, const0, in1, const0, temp0, temp1); \
/external/libvpx/libvpx/vp9/encoder/mips/msa/
Dvp9_fdct_msa.h93 MUL2(in0_r_m, constant_m, in3_r_m, constant_m, s1_m, s0_m); \
106 MUL2(in2_r_m, constant_m, s2_m, constant_m, s3_m, in1_r_m); \
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dp8-scalar_vector_conversions.ll817 ; CHECK-DAG: sldi [[MUL2:[0-9]+]], [[ANDI]], 1
818 ; CHECK-DAG: lvsl [[SHMSK:[0-9]+]], 0, [[MUL2]]
829 ; CHECK-DAG-LE: sldi [[MUL2:[0-9]+]], [[ANDC]], 1
830 ; CHECK-DAG-LE: lvsl [[SHMSK:[0-9]+]], 0, [[MUL2]]
847 ; CHECK-DAG: sldi [[MUL2:[0-9]+]], [[ANDI]], 1
848 ; CHECK-DAG: lvsl [[SHMSK:[0-9]+]], 0, [[MUL2]]
859 ; CHECK-DAG-LE: sldi [[MUL2:[0-9]+]], [[ANDC]], 1
860 ; CHECK-DAG-LE: lvsl [[SHMSK:[0-9]+]], 0, [[MUL2]]
/external/llvm/lib/Target/AMDGPU/
DSIDefines.h101 MUL2 = 1, enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIFoldOperands.cpp855 return SIOutMods::MUL2; in getOModValue()
867 return SIOutMods::MUL2; in getOModValue()
933 return std::make_pair(Src0, SIOutMods::MUL2); in isOMod()
DSIDefines.h175 MUL2 = 1, enumerator
/external/llvm/test/CodeGen/PowerPC/
Dp8-scalar_vector_conversions.ll1033 ; CHECK-DAG: sldi [[MUL2:[0-9]+]], [[ANDI]], 1
1034 ; CHECK-DAG: lvsl [[SHMSK:[0-9]+]], 0, [[MUL2]]
1045 ; CHECK-DAG-LE: sldi [[MUL2:[0-9]+]], [[ANDC]], 1
1046 ; CHECK-DAG-LE: lvsl [[SHMSK:[0-9]+]], 0, [[MUL2]]
1069 ; CHECK-DAG: sldi [[MUL2:[0-9]+]], [[ANDI]], 1
1070 ; CHECK-DAG: lvsl [[SHMSK:[0-9]+]], 0, [[MUL2]]
1081 ; CHECK-DAG-LE: sldi [[MUL2:[0-9]+]], [[ANDC]], 1
1082 ; CHECK-DAG-LE: lvsl [[SHMSK:[0-9]+]], 0, [[MUL2]]
/external/libvpx/libvpx/vp8/common/mips/msa/
Didct_msa.c188 MUL2(input0, dequant_in0, input1, dequant_in1, mul0, mul1); in dequant_idct4x4_addblk_msa()
310 MUL2(dqc0, q0, dqc1, q1, dq0, dq1); in vp8_dequantize_b_msa()
Dvp8_macros_msa.h1434 #define MUL2(in0, in1, in2, in3, out0, out1) \ macro
1441 MUL2(in0, in1, in2, in3, out0, out1); \
1442 MUL2(in4, in5, in6, in7, out2, out3); \
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LICM/
Dsinking.ll421 ; CHECK: %[[MUL2:.*]] = mul i32 %N, %[[LCSSAPHI2]]
422 ; CHECK: %[[SUB:.*]] = sub i32 %[[MUL2]], %N
464 ; CHECK: %[[MUL2:.*]] = mul i32 %N, %[[LCSSAPHI2]]
465 ; CHECK: %[[SUB2:.*]] = sub i32 %[[MUL2]], %N
/external/libvpx/libvpx/vp8/encoder/mips/msa/
Dquantize_msa.c178 MUL2(de_quant0, q_coeff0, de_quant1, q_coeff1, de_quant0, de_quant1); in exact_regular_quantize_b_msa()
/external/libvpx/libvpx/vpx_dsp/mips/
Dmacros_msa.h1537 #define MUL2(in0, in1, in2, in3, out0, out1) \ macro
1544 MUL2(in0, in1, in2, in3, out0, out1); \
1545 MUL2(in4, in5, in6, in7, out2, out3); \
Ddeblock_msa.c679 MUL2(dst_r_h, dst_r_h, dst_l_h, dst_l_h, mult0, mult1); in vpx_mbpost_proc_down_msa()
/external/libaom/libaom/aom_dsp/mips/
Dmacros_msa.h1641 #define MUL2(in0, in1, in2, in3, out0, out1) \ macro
1648 MUL2(in0, in1, in2, in3, out0, out1); \
1649 MUL2(in4, in5, in6, in7, out2, out3); \
/external/llvm/lib/Target/AMDGPU/InstPrinter/
DAMDGPUInstPrinter.cpp616 if (Imm == SIOutMods::MUL2) in printOModSI()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/InstPrinter/
DAMDGPUInstPrinter.cpp1006 if (Imm == SIOutMods::MUL2) in printOModSI()

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