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Searched refs:MUL4 (Results 1 – 17 of 17) sorted by relevance

/external/libaom/libaom/av1/encoder/mips/msa/
Dtemporal_filter_msa.c56 MUL4(diff0_r, diff0_r, diff0_l, diff0_l, diff1_r, diff1_r, diff1_l, diff1_l, in temporal_filter_apply_8size_msa()
58 MUL4(mod0_w, cnst3, mod1_w, cnst3, mod2_w, cnst3, mod3_w, cnst3, mod0_w, in temporal_filter_apply_8size_msa()
75 MUL4(mod0_w, filt_wt, mod1_w, filt_wt, mod2_w, filt_wt, mod3_w, filt_wt, in temporal_filter_apply_8size_msa()
85 MUL4(mod0_w, frm2_rr, mod1_w, frm2_rl, mod2_w, frm2_lr, mod3_w, frm2_ll, in temporal_filter_apply_8size_msa()
103 MUL4(diff0_r, diff0_r, diff0_l, diff0_l, diff1_r, diff1_r, diff1_l, diff1_l, in temporal_filter_apply_8size_msa()
105 MUL4(mod0_w, cnst3, mod1_w, cnst3, mod2_w, cnst3, mod3_w, cnst3, mod0_w, in temporal_filter_apply_8size_msa()
122 MUL4(mod0_w, filt_wt, mod1_w, filt_wt, mod2_w, filt_wt, mod3_w, filt_wt, in temporal_filter_apply_8size_msa()
131 MUL4(mod0_w, frm2_rr, mod1_w, frm2_rl, mod2_w, frm2_lr, mod3_w, frm2_ll, in temporal_filter_apply_8size_msa()
180 MUL4(diff0_r, diff0_r, diff0_l, diff0_l, diff1_r, diff1_r, diff1_l, diff1_l, in temporal_filter_apply_16size_msa()
182 MUL4(mod0_w, cnst3, mod1_w, cnst3, mod2_w, cnst3, mod3_w, cnst3, mod0_w, in temporal_filter_apply_16size_msa()
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/external/libvpx/libvpx/vp8/encoder/mips/msa/
Dtemporal_filter_msa.c48 MUL4(diff0_r, diff0_r, diff0_l, diff0_l, diff1_r, diff1_r, diff1_l, diff1_l, in temporal_filter_apply_16size_msa()
50 MUL4(mod0_w, const3, mod1_w, const3, mod2_w, const3, mod3_w, const3, mod0_w, in temporal_filter_apply_16size_msa()
63 MUL4(mod0_w, filter_wt, mod1_w, filter_wt, mod2_w, filter_wt, mod3_w, in temporal_filter_apply_16size_msa()
72 MUL4(mod0_w, frame2_0, mod1_w, frame2_1, mod2_w, frame2_2, mod3_w, frame2_3, in temporal_filter_apply_16size_msa()
86 MUL4(diff0_r, diff0_r, diff0_l, diff0_l, diff1_r, diff1_r, diff1_l, diff1_l, in temporal_filter_apply_16size_msa()
88 MUL4(mod0_w, const3, mod1_w, const3, mod2_w, const3, mod3_w, const3, mod0_w, in temporal_filter_apply_16size_msa()
101 MUL4(mod0_w, filter_wt, mod1_w, filter_wt, mod2_w, filter_wt, mod3_w, in temporal_filter_apply_16size_msa()
111 MUL4(mod0_w, frame2_0, mod1_w, frame2_1, mod2_w, frame2_2, mod3_w, frame2_3, in temporal_filter_apply_16size_msa()
168 MUL4(diff0_r, diff0_r, diff0_l, diff0_l, diff1_r, diff1_r, diff1_l, diff1_l, in temporal_filter_apply_8size_msa()
170 MUL4(mod0_w, const3, mod1_w, const3, mod2_w, const3, mod3_w, const3, mod0_w, in temporal_filter_apply_8size_msa()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/Reassociate/
Dmixed-fast-nonfast-fp.ll27 ; CHECK-NEXT: [[MUL4:%.*]] = fmul reassoc float %a, %c
29 ; CHECK-NEXT: [[ADD2:%.*]] = fadd reassoc float [[MUL2]], [[MUL4]]
/external/llvm/lib/Target/AMDGPU/
DSIDefines.h102 MUL4 = 2, enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIDefines.h176 MUL4 = 2, enumerator
DSIFoldOperands.cpp857 return SIOutMods::MUL4; in getOModValue()
869 return SIOutMods::MUL4; in getOModValue()
/external/libvpx/libvpx/vp8/common/mips/msa/
Didct_msa.c226 MUL4(in0, dequant_in0, in1, dequant_in1, in2, dequant_in0, in3, dequant_in1, in dequant_idct4x4_addblk_2x_msa()
Dvp8_macros_msa.h1439 #define MUL4(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, out3) \ macro
/external/llvm/lib/Target/AMDGPU/InstPrinter/
DAMDGPUInstPrinter.cpp618 else if (Imm == SIOutMods::MUL4) in printOModSI()
/external/webp/src/dsp/
Dupsampling_msa.c40 MUL4(in0, const0, in1, const0, in2, const0, in3, const0, \
Denc_msa.c827 MUL4(t0, s0, t1, s1, t2, s2, t3, s3, t0, t1, t2, t3); in QuantizeBlock_MSA()
Dmsa_macro.h1229 #define MUL4(in0, in1, in2, in3, in4, in5, in6, in7, \ macro
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/InstPrinter/
DAMDGPUInstPrinter.cpp1008 else if (Imm == SIOutMods::MUL4) in printOModSI()
/external/libvpx/libvpx/vpx_dsp/mips/
Ddeblock_msa.c580 MUL4(sum0_w, sub0, sum1_w, sub1, sum2_w, sub2, sum3_w, sub3, mul0, mul1, in vpx_mbpost_proc_across_ip_msa()
Dmacros_msa.h1542 #define MUL4(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, out3) \ macro
/external/libaom/libaom/aom_dsp/mips/
Dmacros_msa.h1646 #define MUL4(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, out3) \ macro
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenSystemOperands.inc1792 { "MUL4", 14 },