Searched refs:MUL_D (Results 1 – 10 of 10) sorted by relevance
| /external/v8/src/compiler/mips/ |
| D | instruction-scheduler-mips.cc | 390 MUL_D = 5, enumerator
605 return Latency::MUL_D + Latency::ADD_D; in MaddSLatency()
613 return Latency::MUL_D + Latency::ADD_D; in MaddDLatency()
629 return Latency::MUL_D + Latency::SUB_D; in MsubDLatency()
1705 return Latency::MUL_D; in GetInstructionLatency()
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| /external/v8/src/compiler/mips64/ |
| D | instruction-scheduler-mips64.cc | 423 MUL_D = 5, enumerator
1447 return Latency::MUL_D; in GetInstructionLatency()
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| /external/v8/src/mips/ |
| D | constants-mips.h | 629 MUL_D = ((0U << 3) + 2), enumerator
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| D | disasm-mips.cc | 1066 case MUL_D: in DecodeTypeRegisterRsType()
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| D | assembler-mips.cc | 2771 GenInstrRegister(COP1, D, ft, fs, fd, MUL_D); in mul_d()
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| D | simulator-mips.cc | 2792 case MUL_D: in DecodeTypeRegisterDRsType()
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 659 MUL_D = ((0U << 3) + 2), enumerator
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| D | disasm-mips64.cc | 1139 case MUL_D: in DecodeTypeRegisterRsType()
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| D | assembler-mips64.cc | 3158 GenInstrRegister(COP1, S, ft, fs, fd, MUL_D); in mul_s()
3163 GenInstrRegister(COP1, D, ft, fs, fd, MUL_D); in mul_d()
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| D | simulator-mips64.cc | 3110 case MUL_D: in DecodeTypeRegisterDRsType()
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