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Searched refs:MUX_MPLL_SEL_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/
Dclock_init_exynos5.c563 clrbits_le32(&clk->src_core1, MUX_MPLL_SEL_MASK); in exynos5250_system_clock_init()
566 } while ((val | MUX_MPLL_SEL_MASK) != val); in exynos5250_system_clock_init()
Dexynos5_setup.h148 #define MUX_MPLL_SEL_MASK (1 << 8) macro