Searched refs:MV_DDR_TIM_DEFAULT (Results 1 – 7 of 7) sorted by relevance
40 MV_DDR_TIM_DEFAULT, enumerator
611 } else if (timing != MV_DDR_TIM_DEFAULT) { in hws_ddr3_tip_init_controller()1419 } else if (timing != MV_DDR_TIM_DEFAULT) { in ddr3_tip_freq_set()
73 MV_DDR_TIM_DEFAULT} }, /* timing */
71 MV_DDR_TIM_DEFAULT} }, /* timing */
84 MV_DDR_TIM_DEFAULT} }, /* timing */
94 MV_DDR_TIM_DEFAULT} }, /* timing */
57 MV_DDR_TIM_DEFAULT} }, /* timing */