Home
last modified time | relevance | path

Searched refs:MV_OK (Results 1 – 25 of 30) sorted by relevance

12

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_hw_training.c196 if (MV_OK != ddr3_dfs_high_2_low(freq, &dram_info)) { in ddr3_hw_training()
204 if (MV_OK != in ddr3_hw_training()
229 if (MV_OK != in ddr3_hw_training()
237 if (MV_OK != in ddr3_hw_training()
245 if (MV_OK != ddr3_write_leveling_hw( in ddr3_hw_training()
249 if (MV_OK != in ddr3_hw_training()
267 if (MV_OK != ddr3_load_patterns(&dram_info, 0)) { in ddr3_hw_training()
299 if (MV_OK != ddr3_dfs_low_2_high(freq, tmp_ratio, in ddr3_hw_training()
320 if (MV_OK != ddr3_write_leveling_sw( in ddr3_hw_training()
326 if (MV_OK != ddr3_write_leveling_hw( in ddr3_hw_training()
[all …]
Dxor.c151 return MV_OK; in mv_xor_ctrl_set()
205 return MV_OK; in mv_xor_mem_init()
316 return MV_OK; in mv_xor_transfer()
406 return MV_OK; in mv_xor_cmd_set()
412 return MV_OK; in mv_xor_cmd_set()
418 return MV_OK; in mv_xor_cmd_set()
424 return MV_OK; in mv_xor_cmd_set()
428 return MV_OK; in mv_xor_cmd_set()
Dddr3_dqs.c173 if (MV_OK != status) in ddr3_dqs_centralization_rx()
180 if (MV_OK != status) in ddr3_dqs_centralization_rx()
202 return MV_OK; in ddr3_dqs_centralization_rx()
253 if (MV_OK != status) in ddr3_dqs_centralization_tx()
260 if (MV_OK != status) in ddr3_dqs_centralization_tx()
282 return MV_OK; in ddr3_dqs_centralization_tx()
412 if (MV_OK != ddr3_sdram_dqs_compare(dram_info, in ddr3_find_adll_limits()
507 if (MV_OK != in ddr3_find_adll_limits()
814 return MV_OK; in ddr3_find_adll_limits()
838 return MV_OK; in ddr3_check_window_limits()
[all …]
Dddr3_pbs.c217 if (MV_OK != ddr3_tx_shift_dqs_adll_step_before_fail in ddr3_pbs_tx()
228 if (MV_OK != ddr3_pbs_per_bit( in ddr3_pbs_tx()
392 return MV_OK; in ddr3_pbs_tx()
462 if (MV_OK != ddr3_sdram_compare(dram_info, unlock_pup, in ddr3_tx_shift_dqs_adll_step_before_fail()
509 return MV_OK; in ddr3_tx_shift_dqs_adll_step_before_fail()
667 if (MV_OK != status) { in ddr3_pbs_rx()
722 return MV_OK; in ddr3_pbs_rx()
728 if (MV_OK != ddr3_pbs_per_bit( in ddr3_pbs_rx()
904 return MV_OK; in ddr3_pbs_rx()
965 if (MV_OK != ddr3_sdram_compare(dram_info, unlock_pup, in ddr3_rx_shift_dqs_to_first_fail()
[all …]
Dddr3_sdram.c200 return MV_OK; in ddr3_sdram_compare()
264 return MV_OK; in ddr3_sdram_dm_compare()
422 return MV_OK; in ddr3_sdram_pbs_compare()
481 return MV_OK; in ddr3_sdram_direct_compare()
536 if (mv_xor_transfer(chan, MV_DMA, channel.desc_phys_addr) != MV_OK) in ddr3_dram_sram_burst()
547 return MV_OK; in ddr3_dram_sram_burst()
596 return MV_OK; in ddr3_dram_sram_read()
633 return MV_OK; in ddr3_sdram_dqs_compare()
Dddr3_write_leveling.c170 return MV_OK; in ddr3_write_leveling_hw()
266 if (MV_OK != ddr3_dram_sram_burst((u32) in ddr3_wl_supplement()
273 if (MV_OK != in ddr3_wl_supplement()
461 return MV_OK; in ddr3_wl_supplement()
615 return MV_OK; in ddr3_write_leveling_hw_reg_dimm()
767 if (MV_OK != in ddr3_write_leveling_sw()
869 return MV_OK; in ddr3_write_leveling_sw()
1008 if (MV_OK != in ddr3_write_leveling_sw_reg_dimm()
1110 return MV_OK; in ddr3_write_leveling_sw_reg_dimm()
1332 return MV_OK; in ddr3_write_leveling_single_cs()
Dddr3_spd.c495 return MV_OK; in ddr3_spd_init()
510 return MV_OK; in ddr3_spd_sum_init()
564 return MV_OK; in ddr3_spd_sum_init()
599 if (MV_OK != status)
607 if (MV_OK != status)
628 if (MV_OK != status)
631 if (MV_OK != status)
1238 return MV_OK;
Dddr3_read_leveling.c163 return MV_OK; in ddr3_read_leveling_hw()
248 if (MV_OK != status) in ddr3_read_leveling_sw()
256 if (MV_OK != status) in ddr3_read_leveling_sw()
327 return MV_OK; in ddr3_read_leveling_sw()
458 if (MV_OK != in ddr3_read_leveling_single_cs_rl_mode()
736 return MV_OK; in ddr3_read_leveling_single_cs_rl_mode()
812 if (MV_OK != in ddr3_read_leveling_single_cs_window_mode()
1211 return MV_OK; in ddr3_read_leveling_single_cs_window_mode()
Dddr3_init.c455 return MV_OK; in ddr3_init_main()
505 if (MV_OK != status) { in ddr3_init_main()
609 if (MV_OK != status) { in ddr3_init_main()
632 if (MV_OK != status) { in ddr3_init_main()
681 return MV_OK; in ddr3_init_main()
/external/u-boot/drivers/ddr/marvell/a38x/
Dmv_ddr_plat.c236 return MV_OK; in ddr3_tip_a38x_get_freq_config()
300 return MV_OK; in mv_ddr_is_odpg_done()
345 return MV_OK; in mv_ddr_is_training_done()
375 return MV_OK; in ddr3_tip_a38x_select_ddr_controller()
477 return MV_OK; in mv_ddr_sar_freq_get()
554 return MV_OK; in ddr3_tip_a38x_get_medium_freq()
566 return MV_OK; in ddr3_tip_a38x_get_device_info()
585 return MV_OK; in is_prfa_done()
605 if (is_prfa_done() != MV_OK) in prfa_write()
608 return MV_OK; in prfa_write()
[all …]
Dddr3_training_bist.c61 if (mv_ddr_is_odpg_done(MAX_POLLING_ITERATIONS) != MV_OK) in ddr3_tip_bist_activate()
67 return MV_OK; in ddr3_tip_bist_activate()
88 if (ret != MV_OK) in ddr3_tip_bist_read_result()
94 if (ret != MV_OK) in ddr3_tip_bist_read_result()
101 if (ret != MV_OK) in ddr3_tip_bist_read_result()
107 if (ret != MV_OK) in ddr3_tip_bist_read_result()
111 return MV_OK; in ddr3_tip_bist_read_result()
135 if (ret != MV_OK) { in hws_ddr3_run_bist()
146 if (ret != MV_OK) { in hws_ddr3_run_bist()
152 if (ret != MV_OK) { in hws_ddr3_run_bist()
[all …]
Dddr3_training.c252 return MV_OK; in ddr3_tip_tune_training_params()
308 return MV_OK; in ddr3_tip_configure_cs()
346 return MV_OK; in calc_cs_num()
689 return MV_OK; in hws_ddr3_tip_init_controller()
746 return MV_OK; in ddr3_tip_rev2_rank_control()
779 return MV_OK; in ddr3_tip_rev3_rank_control()
829 return MV_OK; in ddr3_tip_pad_inv()
899 return (status == 1) ? MV_OK : MV_NOT_INITIALIZED; in ddr3_tip_validate_algo_components()
933 return MV_OK; in ddr3_pre_algo_config()
942 if (MV_OK != status) { in ddr3_post_algo_config()
[all …]
Dddr3_init.c63 if (mv_ddr_early_init2() != MV_OK) in ddr3_init()
68 if (MV_OK != status) in ddr3_init()
83 if (MV_OK != status) { in ddr3_init()
90 if (MV_OK != status) { in ddr3_init()
115 return MV_OK; in ddr3_init()
218 if (MV_OK != status) { in mv_ddr_training_params_set()
223 return MV_OK; in mv_ddr_training_params_set()
Dddr3_training_leveling.c204 if (mv_ddr_is_training_done(MAX_POLLING_ITERATIONS, &data) != MV_OK) { in ddr3_tip_dynamic_read_leveling()
215 if (mv_ddr_is_odpg_done(MAX_POLLING_ITERATIONS) != MV_OK) { in ddr3_tip_dynamic_read_leveling()
236 MAX_POLLING_ITERATIONS) != MV_OK) { in ddr3_tip_dynamic_read_leveling()
334 return MV_OK; in ddr3_tip_dynamic_read_leveling()
368 MAX_POLLING_ITERATIONS) != MV_OK) { in ddr3_tip_legacy_dynamic_write_leveling()
375 return MV_OK; in ddr3_tip_legacy_dynamic_write_leveling()
409 MAX_POLLING_ITERATIONS) != MV_OK) { in ddr3_tip_legacy_dynamic_read_leveling()
416 return MV_OK; in ddr3_tip_legacy_dynamic_read_leveling()
577 if (mv_ddr_is_training_done(MAX_POLLING_ITERATIONS, &data) != MV_OK) { in ddr3_tip_dynamic_per_bit_read_leveling()
588 if (mv_ddr_is_odpg_done(MAX_POLLING_ITERATIONS) != MV_OK) { in ddr3_tip_dynamic_per_bit_read_leveling()
[all …]
Dxor.c161 return MV_OK; in mv_xor_ctrl_set()
218 return MV_OK; in mv_xor_mem_init()
307 return MV_OK; in mv_xor_command_set()
313 return MV_OK; in mv_xor_command_set()
320 return MV_OK; in mv_xor_command_set()
326 return MV_OK; in mv_xor_command_set()
329 return MV_OK; in mv_xor_command_set()
463 return MV_OK; in mv_xor_transfer()
Dddr3_training_ip_engine.c551 if (mv_ddr_is_training_done(MAX_POLLING_ITERATIONS, &data) != MV_OK) { in ddr3_tip_ip_training()
563 return MV_OK; in ddr3_tip_ip_training()
617 return MV_OK; in ddr3_tip_load_pattern_to_odpg()
638 if (ret != MV_OK) in ddr3_tip_configure_odpg()
641 return MV_OK; in ddr3_tip_configure_odpg()
684 return MV_OK; in ddr3_tip_process_result()
839 return MV_OK; in ddr3_tip_read_training_result()
866 return MV_OK; in ddr3_tip_load_all_pattern_to_mem()
925 if (mv_ddr_is_odpg_done(MAX_POLLING_ITERATIONS) != MV_OK) in ddr3_tip_load_pattern_to_mem()
947 return MV_OK; in ddr3_tip_load_pattern_to_mem()
[all …]
Dddr3_debug.c161 return MV_OK; in ddr3_tip_reg_dump()
176 return MV_OK; in ddr3_tip_init_config_func()
193 return MV_OK; in hws_ddr3_tip_read_training_result()
325 return MV_OK; in print_device_info()
519 return MV_OK; in ddr3_tip_print_log()
671 return MV_OK; in ddr3_tip_print_stability_log()
681 return MV_OK; in ddr3_tip_register_xsb_info()
877 return MV_OK; in ddr3_tip_print_adll()
1224 return MV_OK; in ddr3_tip_access_atr()
1246 return MV_OK; in print_adll()
[all …]
Dddr3_training_centralization.c36 return MV_OK; in ddr3_tip_centralization_rx()
46 return MV_OK; in ddr3_tip_centralization_tx()
512 return MV_OK; in ddr3_tip_special_rx()
689 return MV_OK; in ddr3_tip_special_rx()
712 return MV_OK; in ddr3_tip_print_centralization_result()
Dmv_ddr_common.c46 return MV_OK; in round_div()
Dddr3_training_pbs.c890 return MV_OK; in ddr3_tip_pbs()
931 return MV_OK; in ddr3_tip_print_all_pbs_result()
980 return MV_OK; in ddr3_tip_print_pbs_result()
1008 return MV_OK; in ddr3_tip_clean_pbs_result()
/external/u-boot/arch/arm/mach-mvebu/serdes/a38x/
Dseq_exec.c40 return MV_OK; in write_op_execute()
66 return MV_OK; in write_op_execute()
80 return MV_OK; in delay_op_execute()
97 return MV_OK; in poll_op_execute()
123 return MV_OK; in poll_op_execute()
167 return MV_OK; in mv_seq_exec()
Dhigh_speed_env_spec.c861 return MV_OK; in hws_serdes_topology_verify()
1294 return MV_OK; in hws_serdes_seq_db_init()
1409 return MV_OK; in hws_pre_serdes_init_config()
1424 if (hws_serdes_seq_init() != MV_OK) { in serdes_phy_config()
1453 return MV_OK; in serdes_phy_config()
1467 return MV_OK; in serdes_polarity_config()
1554 return MV_OK; in hws_power_up_serdes_lanes()
1586 return MV_OK; in serdes_pex_usb3_pipe_delay_w_a()
1637 return MV_OK; in hws_serdes_pex_ref_clock_satr_get()
1909 return MV_OK; in serdes_power_up_ctrl()
[all …]
Dhigh_speed_env_spec-38x.c39 if (hws_serdes_seq_db_init() != MV_OK) { in hws_serdes_seq_init()
44 return MV_OK; in hws_serdes_seq_init()
115 return MV_OK; in hws_get_ext_base_addr()
Dctrl_pex.c224 return MV_OK; in hws_pex_config()
245 return MV_OK; in pex_local_bus_num_set()
260 return MV_OK; in pex_local_dev_num_set()
/external/u-boot/arch/arm/mach-mvebu/serdes/axp/
Dhigh_speed_env_lib.c146 return MV_OK; in board_modules_scan()
248 int status = MV_OK; in serdes_phy_config()
273 return MV_OK; in serdes_phy_config()
289 return MV_OK; in serdes_phy_config()
938 status = MV_OK; in serdes_phy_config()
996 if (status == MV_OK) in serdes_phy_config()
1415 return MV_OK; in serdes_phy_config()
1574 return MV_OK; in pex_local_bus_num_set()
1609 return MV_OK; in pex_local_dev_num_set()

12