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Searched refs:MX6UL_SNVS_LP_BASE_ADDR (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-imx/mx6/
Dsoc.c414 writel((readl(MX6UL_SNVS_LP_BASE_ADDR + 0x10) & in arch_cpu_init()
416 MX6UL_SNVS_LP_BASE_ADDR + 0x10); in arch_cpu_init()
430 writel(readl(MX6UL_SNVS_LP_BASE_ADDR) | in arch_cpu_init()
431 0x3, MX6UL_SNVS_LP_BASE_ADDR); in arch_cpu_init()
/external/u-boot/arch/arm/include/asm/arch-mx6/
Dimx-regs.h187 #define MX6UL_SNVS_LP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x30000) macro